BBC Microcomputer Service Manual Oct 1985 Section 1 BBC Micro ...
BBC Microcomputer Service Manual Oct 1985 Section 1 BBC Micro ...
BBC Microcomputer Service Manual Oct 1985 Section 1 BBC Micro ...
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<strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> service manual<br />
SECTION 1 <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> Models A and B (ANA01 - ANB04)<br />
SECTION 2 <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> Model B+ (ANB51 - ANB54)<br />
SECTION 3 Additional Upgrades<br />
1770 Disc interface daughter board upgrade<br />
64K Sideways RAM upgrade<br />
Part No. 0433,001<br />
Issue 1<br />
<strong>Oct</strong>ober <strong>1985</strong>
Within this publication the term '<strong>BBC</strong>' is used as an<br />
abbreviation for 'British Broadcasting Corporation'.<br />
Copyright ACORN Computers Limited <strong>1985</strong><br />
Neither the whole or any part of the information contained in,<br />
or the product described in, this manual may be adapted or<br />
reproduced in any material form except with the prior written<br />
approval of ACORN Computers Limited (ACORN Computers).<br />
The product described in this manual and products for use with<br />
it, are subject to continuous development and improvement. All<br />
information of a technical nature and particulars of the product<br />
and its use (including the information and particulars in this<br />
manual) are given by ACORN Computers in good faith. However, it<br />
is acknowledged that there may be errors or omissions in this<br />
manual. A list of details of any amendments or revisions to this<br />
manual can be obtained upon request from ACORN Computers<br />
Technical. Enquiries. ACORN Computers welcome comments and<br />
suggestions relating to the product and this manual.<br />
All correspondence should be addressed to:-<br />
Technical Enquiries<br />
ACORN Computers<br />
Limited Newmarket<br />
Road<br />
Cambridge<br />
CB5 8PD<br />
All maintenance and service on the product must be carried out<br />
by ACORN Computers' authorised dealers. ACORN Computers can<br />
accept no liability whatsoever for any loss or damage caused by<br />
service or maintenance by unauthorised personnel. This manual is<br />
intended only to assist the reader in the use of this product,<br />
and therefore ACORN Computers shall not be liable for any loss<br />
or damage whatsoever arising from the use of any information or<br />
particulars in, or any error or omission in, this manual, or any<br />
incorrect use of the product.<br />
This manual is for the sole use of ACORN Computers' authorised<br />
dealers and must only be used by them in connection with the<br />
product described within.<br />
First published <strong>1985</strong><br />
Published by ACORN Computers Limited
SECTION 1 <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> Models A & B
<strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> <strong>Service</strong> <strong>Manual</strong><br />
Contents<br />
1 - Introduction<br />
1.1 Nature and purpose of the manual<br />
1.2 Technical specification<br />
1.2.1 Model A specification<br />
1.2.2 Model B specification 1.2.3 Expansion<br />
1.2.4 Software<br />
1.2.5 Machine operating system 1.2.6 BASIC<br />
1.3 Packaging<br />
1.4 Mechanical assembly of the case etc<br />
2 - General Circuit Description<br />
2.1 Introduction<br />
2.2 Hardware description<br />
3 - Detailed Circuit Descriptions<br />
3.1 Processor + clock circuitry + reset circuitry<br />
3.2 Memory + address decoding<br />
3.3 DRAMs + CRT controller + video processor + Teletext hardware<br />
3.4 RGB + PAL encoder + UHF output<br />
3.5 Cassette + RS423 + serial processor<br />
3.6 Internal VIA<br />
3.7 Keyboard<br />
3.8 Sound + speech + serial ROM interfaces<br />
3.9 A to D converters<br />
3.10 Disc interface<br />
3.11 Printer + user port interfaces<br />
3.12 Econet<br />
3.13 1 MHz bus 3.14 Power supply<br />
4 - Upgrading the PCB<br />
4.1 Convert from EPROM MOS to ROM MOS<br />
4.2 Convert model A to model B<br />
4.3 Add speech option<br />
4.4 Add 5 1/4 inch disc interface to model B<br />
4.5 Add Econet interface to model A<br />
4.6 Add 8 inch disc interface to model B<br />
4.7 Partial upgrading<br />
5 - Selection links & Circuit changes<br />
5.1 Selection link survey<br />
5.2 Table of link options<br />
5.3 Circuit modifications from Issue 1 to Issue 7<br />
5.3.1 Changes from issue 2 to 3<br />
5.3.2 Changes from issue 3 to 4<br />
5.3.3 Changes from issue 4 to 7
6 - Servicing + Fault-finding<br />
6.1 Introduction<br />
6.2 Test equipment<br />
6.3 Fault isolation<br />
6.4 Most common faults<br />
6.5 Test programs + sample waveforms<br />
6.5.1 Test program<br />
6.5.2 Test ROM<br />
7 - Interfacing Survey<br />
7.1 Purpose of each interface<br />
7.2 Interfacing to various printers<br />
7.3 Hardware hints and tips<br />
8 - Component location tables<br />
8.1 Integrated circuits<br />
8.2 Transistors<br />
8.3 Diodes<br />
8.4 Capacitors<br />
8.5 Resistors<br />
8.6 Links<br />
9 - Appendices<br />
9.1 Circuit block diagram<br />
9.2 Assembly Drawing<br />
9.3 Case Lower Assembly Drawing<br />
9.4 Main PCB Layout<br />
9.5 Main PCB Circuit Diagram<br />
Issue 9 (issue 7 board) as full foldout<br />
9.6 Keyboard Circuit Diagram<br />
9.7 Power Supply Circuit Diagram<br />
9.8 Parts list for B + disc + Econet<br />
9.9 Glossary of abreviations
WARNING: THE COMPUTER MUST BE EARTHED<br />
IMPORTANT: The wires in the mains lead for the computer are coloured<br />
in accordance with the following code:<br />
GREEN & YELLOW - EARTH<br />
BLUE - NEUTRAL<br />
BROWN - LIVE<br />
As the colours of the wires may not correspond with the coloured<br />
markings identifying the terminals in your plug, proceed as follows:<br />
The wire which is coloured green and yellow must be connected to the<br />
terminal in the plug which is marked by the letter E, or by the safety<br />
earth symbol =|= , or coloured either green or green and yellow.<br />
The wire which is coloured blue must be connected to the terminal<br />
which is marked by the letter N, or coloured black.<br />
The wire which is coloured brown must be connected to the terminal<br />
which is marked by the letter L, or coloured red.<br />
If the socket outlet available is not suitable for the plug supplied,<br />
the plug should be cut off and the appropriate plug fitted and wired as<br />
previously noted. The moulded plug which was cut off must be disposed<br />
of as it would be a potential shock hazard if it were to be plugged in<br />
with the cut off end of mains cord exposed.<br />
The moulded plug must be used with the fuse and the fuse carrier firmly<br />
in place. The fuse carrier is of the same basic colour* as the coloured<br />
insert in the base of the plug. Different manufacturers' plugs and fuse<br />
carriers are not interchangeable. In the event of loss of the fuse<br />
carrier the moulded plug MUST NOT be used. Either replace the moulded<br />
plug with another conventional plug wired as previously described, or<br />
obtain a replacement fuse carrier from an authorised <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong><br />
dealer. In the event of the fuse blowing, it should be replaced, after<br />
clearing any faults, with a 3 amp fuse that is ASTA approved to BS<br />
1362.<br />
This computer was designed and manufactured to comply with BS 415. In<br />
order to ensure the continued safety of Acorn products, power supplies<br />
should be returned to Acorn for repair.<br />
Do not use the <strong><strong>Micro</strong>computer</strong> in conditions of extreme heat, cold,<br />
humidity or dust or in places subject to vibration. Do not block<br />
ventilation under or behind the computer. Ensure that ,no foreign<br />
objects are inserted through any openings in the <strong><strong>Micro</strong>computer</strong>.<br />
*Not necessarily the same shade of that colour.
1 Introduction<br />
1.1 Nature and Purpose of the <strong>Manual</strong><br />
The purpose of this manual is to provide technical and diagnostic<br />
information about the <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong>.<br />
After giving general information about the technical specification and<br />
the mechanical assembly of the <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong>, it gives a detailed<br />
description of the operation of the whole of the circuit. Information<br />
is also given about how to upgrade the various models of microcomputer<br />
and the purpose of the various links on the circuit board. Some details<br />
are also given of the ways in which the circuit has changed in its<br />
evolution from issue 1 up to issue 7. There is some guidance about<br />
servicing and fault-finding, further information about interfacing and<br />
a few suggestions about possible applications. Finally there is a<br />
section of hardware hints and tips which is a compilation of ideas from<br />
various sources.<br />
1.2 Technical Specification<br />
The <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> is supplied with two levels of hardware<br />
provision, designated, model A and model B, the former being fully<br />
upgradable to the latter.<br />
1.2.1 Model A Specification<br />
A fast, powerful self-contained computer system generating high<br />
resolution colour graphics and capable of synthesising 3 part music + 1<br />
channel of noise. The computer is contained in a rigid injection<br />
moulded thermoplastic case. The following are contained within the<br />
computer thus ensuring the minimum of connecting wires.<br />
* 73 key full travel QWERTY keyboard including 10 user definable<br />
function keys. The keyboard has two key rollover and auto repeat.<br />
* Internal power supply is fully encased and manufactured to BS 415<br />
Class 1.<br />
* The internal loudspeaker is driven from a 4-channel sound synthesis<br />
circuit with full ADSR envelope control.<br />
* A colour television signal, for connection to a normal domestic<br />
television aerial socket, is available through a phono connector. This<br />
signal is 625 line, 50Hz, interlaced, fully encoded PAL and is<br />
modulated on UHF channel 36.<br />
* A BNC connector supplies a composite video output to drive a black<br />
and white or PAL colour monitor.<br />
* A standard audio cassette recorder can be used to record computer<br />
programs and data at 300 or 1200 baud using the Computer Users Tape<br />
Standard tones. The cassette recorder is under full automatic motor<br />
control and is connected to the computer via a 7 pin DIN connector.<br />
1
* An interrupt driven elapsed time clock enables real-time control<br />
and timing of user responses.<br />
* The unit uses a 2 MHz 6502A and includes 16K of Random Access Memory.<br />
* A 16K Read Only Memory (ROM) integrated circuit contains a Machine<br />
Operating System designed to interface easily to high level languages.<br />
* A further 16K Language ROM contains a fast BASIC interpreter. The<br />
interpreter includes a 6502 assembler which enables BASIC statements to<br />
be freely mixed with 6502 assembly language.<br />
* Up to four 16K "sideways" ROMs may be plugged into the machine at<br />
any time. These four ROMs are "paged" and may include Pascal, word<br />
processing, computer aided design software, disc and Econet filing<br />
systems or Teletext acquisition software.<br />
* The full-colour Teletext display of 40 characters by 25 lines, known<br />
as mode 7, has character rounding, with double height, flashing,<br />
coloured background and text plus pixel graphics - all to the Teletext<br />
standard.<br />
* The non-Teletext display modes (modes 0 to 6) provide user definable<br />
characters in addition to the standard upper and lower case alphanumeric<br />
font. In these modes, graphics may be freely mixed with text.<br />
Text characters can be positioned not only on, for example, a 40 x 32<br />
grid, but at any intermediate position.<br />
* Separate or overlapping text and graphic windows can be easily userdefined<br />
over any area of the display. Each of these windows may be<br />
filled separately and the text window scrolls independently of the rest<br />
of the screen.<br />
* The Model A is able to support the following modes:-<br />
Mode 4: 320 x 256, 2 colour graphics and 40 x 32 text (10K)<br />
Mode 5: 160 x 256, 4 colour graphics and 20 x 32 text (10K)<br />
Mode 6: 40 x 25, 2 colour text only (8K)<br />
Mode 7: 40 x 25, Teletext display (1K)<br />
* All graphics access is "transparent" (see section 2.2), resulting in<br />
a fast, snow-free display.<br />
* Extensive support is provided in the Machine Operating System for<br />
the graphics facilities, and this is reflected in the BASIC<br />
interpreter. These facilities include the ability to draw lines very<br />
rapidly and to fill large areas of colour. In addition, very rapid<br />
changes of areas of colour can be effected by the use of a colour "<br />
palette".<br />
* The Model A <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> can be expanded at any time to the<br />
Model B. In addition, or as an alternative, other facilities such as<br />
the Econet may be fitted within the computer system.<br />
2
1.2.2 Model B Specification<br />
The Model B <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> is an enhanced version of the Model A<br />
<strong><strong>Micro</strong>computer</strong> with the following differences:-<br />
* 32K Random Access Memory (RAM). This enables the following extra<br />
graphics modes to be used:-<br />
Mode 0: 640 x 256, 2 colour graphics and 80 x 32 text (20K)<br />
Mode 1: 320 x 256, 4 colour graphics and 40 x 32 text (20K)<br />
Mode 2: 160 x 256, 16 colour graphics and 20 x 32 text (20K)<br />
Mode 3: 80 x 25, 2 colour text only (16K)<br />
* The installed RAM is divided between the high resolution graphics<br />
display, the user's program and Machine Operating System variables. If<br />
higher resolutions are required with large programs, then the second<br />
processor option may be fitted.<br />
* 6 pin DIN connector provides separate RGB and sync outputs at TTL<br />
levels. RGB are all high true, and sync is link selectable as high or<br />
low true, pulse duration 4.7 microseconds.<br />
* Serial interface to RS423 standard. The new standard has been<br />
designed to be inter-operable with RS232C equipment but offers a<br />
considerably enhanced specification - for example in maximum length of<br />
cable and maximum data transfer rates. Baud rates are software<br />
selectable between 75 baud and 9600 baud. The interface provides not<br />
only two-way data transfer, but also two-way hand-shaking using RTS and<br />
CTS lines. The software for implementing this interface is only<br />
provided with operating systems 1.2 onwards.<br />
* An 8 bit input/output port with 2 control bits is also provided.<br />
* Four analogue input channels are provided. Each channel has an input<br />
voltage range of 0 - 1.8V. The conversion time for each channel is 10<br />
milliseconds. These analogue inputs can be used not only as inputs for<br />
games-paddles or joysticks but also in laboratory control situations.<br />
The resolution of the ADC chip is 12 bits, but its conversion is such<br />
that only 9 or 10 bits are significant. However with suitable<br />
averaging, this can be extended to the full 12 bits accuracy.<br />
* A 1 MHz buffered extension bus is provided for connection to a<br />
variety of external hardware such as a Teletext acquisition unit, IEEE<br />
488 interface, Winchester disc drive etc.<br />
3
1.2.3 Expansion<br />
The following expansion options are available, some of which may be<br />
fitted internally at purchase, but all of which could be fitted by<br />
Dealers at a later date:-<br />
* Floppy disc interface (fitted as an option at purchase)<br />
* Econet network interface (fitted as an option at purchase)<br />
* Voice synthesis circuit with cartridge ROM pack interface<br />
* Various alternative high-level languages in ROM<br />
External options which plug directly into the machine include:-<br />
* Games paddles<br />
* Cassette Recorder<br />
* Black and White and colour monitors and televisions<br />
* 5 1/4" disc drives, ranging from single-sided single density (100K)<br />
to dual double sided double track density (800K).<br />
* Dot-matrix or daisy wheel printers, serial or parallel interface<br />
* Teletext acquisition unit enabling Tele-software to be downloaded<br />
into the <strong>BBC</strong> Computer as well as providing access to the normal<br />
Teletext services. Pages may be "grabbed" and stored for later use.<br />
* 3 MHz 6502 second processor with 64K of RAM.<br />
* Z80 second processor with 64K of RAM and a fully CP/M-compatible<br />
operating system.<br />
* IEEE interface<br />
* Winchester 10 megabyte disc drive<br />
* Prestel adaptor unit<br />
1.2.4 Software<br />
Considerable attention has been paid to the overall design of both<br />
systems and applications software. A modular approach has been adopted<br />
specifically to ease the interfacing of various high-level languages (<br />
such as BASIC and Pascal) to the operating system.<br />
1.2.5 Machine Operating System<br />
A 16K ROM is used for the MOS. This software controls all input/output<br />
devices using a well defined interface. The MOS supports the following<br />
interrupts (the full implementation only being available from MOS 1.2<br />
onwards):-<br />
* Event Timer (10ms) (used as an elapsed time clock)<br />
* 4 channel analogue to digital converter<br />
* Vertical sync<br />
* Keyboard and keyboard buffer<br />
* Music tone generation and buffer<br />
* Serial interface, input and output buffers<br />
* Parallel input/output port<br />
and 'hooks' are provided to support other devices such as:-<br />
* Teletext acquisition<br />
* Prestel acquisition<br />
* Econet file system<br />
* Disk file system<br />
* Byte transfer to second processor<br />
The majority of the operating system calls are vectored to enable the<br />
user to change them if required.<br />
4
1.2.6 BASIC<br />
The BASIC interpreter is an extremely fast implementation, with<br />
numerous powerful extensions:-<br />
* Long variable names<br />
* Integer, floating point and string variables<br />
* Multi-dimension integer, floating point and string arrays<br />
* Extensive support for string handling<br />
* IF ... THEN ... ELSE<br />
* REPEAT ... UNTIL<br />
* Multi-line integer, floating point and string functions<br />
* Procedures<br />
* Local variables<br />
* Full recursion on all functions and procedures<br />
* Effective error trapping and handling<br />
* Cassette loading and saving of programs and data<br />
* Full support for the extensive colour graphics facilities<br />
* Easy control of the built-in music generation circuits<br />
* Built-in 6502 mnemonic assembler enabling BASIC and assembler to be<br />
mixed, or pure assembly language programs to be produced.<br />
1.3 Packaging<br />
The <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> is supplied in a two part moulded polystyrene<br />
packing which is further packaged within a cardboard sleeve. With the<br />
<strong><strong>Micro</strong>computer</strong>, a User's <strong>Manual</strong>, a Welcome Cassette package and a UHF TV<br />
lead are also supplied. The packaging should be kept intact in case it<br />
becomes necessary to transport the unit at a later date.<br />
1.4 Mechanical assembly of case etc<br />
The lid of the <strong><strong>Micro</strong>computer</strong> case may be removed after undoing four<br />
fixing screws, two on the rear panel and two underneath. When<br />
reassembling, press the lid down at the rear whilst tightening the two<br />
rear fixing screws. Take care not to lose the two spire clips pushed<br />
onto the case lid, into which the rear fixing screws locate. NB Do not<br />
remove the lid with the mains power connected.<br />
Inside the <strong><strong>Micro</strong>computer</strong> are three main sub-assemblies:<br />
power supply unit, keyboard and the main printed circuit board.<br />
To remove the keyboard, undo the two or, in some cases, three screws<br />
and nuts holding it to the case bottom, take care to note the positions<br />
of the associated washers. Unplug the 17 way keyboard connector and the<br />
2-way loudspeaker connector from the main printed circuit board, and<br />
the 10 way serial-ROM connector, if fitted.<br />
The power supply unit is connected to the main circuit board by seven<br />
push-on connectors which may be unplugged. Three screws on the<br />
underside of the case are undone allowing the unit to be removed. On<br />
reassembly, ensure that the same type of screw is used.<br />
The main printed circuit board can be removed after the two wires to<br />
SK2 (composite video BNC socket) have been disconnected. Undo the four<br />
fixing screws (five or seven screws on later issue boards) and remove<br />
the circuit board from the case by sliding it forwards and then lifting<br />
it from the rear.<br />
5
2 General Description of Hardware<br />
2.1 Introduction<br />
This next section gives a general description of the hardware of the<br />
computer, and reference is made to the functional block diagram (<br />
section 9.1) which is laid out approximately as the components are<br />
situated on the printed circuit board. General areas and component<br />
orientations are referred to by using compass points, as shown on the<br />
block diagram. When any reference needs to be made to the specific<br />
position of a component, then X-Y co-ordinates will be used, giving the<br />
distances in millimetres from the SW corner. This is also shown on the<br />
block diagram. A list is given in section 8 of this manual of all the<br />
integrated circuits, transistors, diodes, capacitors, resistors and<br />
selection links by number, including their X-Y co-ordinates on the PCB<br />
and on the main circuit diagram.<br />
As each section of the hardware is described, reference is made to<br />
sections of the following chapter in which more detailed descriptions<br />
are given. The heart of the hardware is the 6502 microprocessor, and in<br />
this general description we shall move around 'he 6502 in an anticlockwise<br />
direction starting from the SE corner c the PCB.<br />
2.2 Hardware description<br />
The 6502 accesses an area of just less than 32 Kbytes of ROM. (3/4K of<br />
this memory allocation is actually used for memory-mapped input/output.)<br />
The ROM is arranged in such a way that one group of 16K bytes forms a<br />
fixed part of the memory map (15 1/4K ROM for the operating system +<br />
3/4K of I/O), whilst the other 16K has been organised to give as much<br />
flexibility as possible. There is a ROM select facility for accessing<br />
up to 16 different memory devices, although only four sideways ROM<br />
sockets are available on the PCB. It is expected that the normal way in<br />
which these four sockets will be used is to provide 2 MHz access to<br />
each of 4 chips which could be either 16K or 8K, ROMs or EPROMs. [See<br />
section 3.2]<br />
The RAM is also divided into two sections of 16 Kbytes, each of which<br />
contains eight 16K by 1 bit DRAM chips. In the model A microcomputer,<br />
only one bank of 16K is present whilst both are present in the model B.<br />
This RAM has to be accessed by both the processor itself and also the<br />
CRT controller. This is done by using a form of "transparent access" in<br />
which both the processor and the CRT controller can access the RAM at<br />
the full clock speed by interleaving the accesses on alternate phases<br />
of the system clock. [See section 3.3]<br />
The display is extremely versatile, and uses two entirely different<br />
methods depending on screen mode. Mode 7 uses Teletext hardware which<br />
produces RGB signals by having its own character generator and accepting<br />
data from the RAM as ASCII characters. This means that it uses very<br />
little RAM (only 1 Kbyte), and apart from providing the addressing for<br />
the RAM, the only thing which the CRT controller has to do is to add<br />
the cursor information and sync signals.<br />
6
In the other screen modes, the information is stored in RAM as actual<br />
bit patterns for every character that is written to the screen. This is<br />
expensive in terms of memory usage, (between 8K and 20K in the<br />
different modes) but it makes it extremely versatile, especially when<br />
mixing graphics with text. The addressing of the RAM for the different<br />
modes is performed by the 6845 CRT controller, whilst the data is taken<br />
from the RAM and serialised by a custom designed circuit, known as the<br />
video processor. This data is not used directly to produce RGB<br />
information, but can be thought of as a set of logical colour numbers<br />
which are passed to an area of high speed RAM within the video<br />
processor referred to as the colour palette. This determines, for each<br />
logical colour number, which combination of red, green and blue is<br />
produced, and whether or not the colour is flashing. The video<br />
processor is also responsible for selecting either the RGB signals<br />
coming from the Teletext chip or the signals coming from the palette<br />
and sending them out to the RGB buffers and the PAL encoder.<br />
This RGB information is presented, after buffering, on the RGB<br />
connector. To provide a UHF output, the RGB signals are combined with<br />
the sync signals and fed into a UHF modulator. A video output is also<br />
provided which consists of a summing of the RGB signals in such a way<br />
as to give an appropriate grey scale. On issue 4 boards onwards, the<br />
option is given of adding colour to the video signal in order to<br />
provide a PAL encoded video output. [See section 3.4]<br />
Moving on round in an anti-clockwise direction we come to the two<br />
serial interfaces, the cassette interface and the RS423. These<br />
facilities are both provided by a standard ACIA (Asynchronous<br />
Communications Interface Adaptor) - the 6850, and a custom designed<br />
circuit referred to as, the serial processor. This processor contains<br />
the programmable baud rate generators for transmit and receive which<br />
provide the clocks for the ACIA. The ACIA itself is responsible for<br />
serialising the data, providing the control lines for the RS423 and<br />
generating interrupts, whilst the serial processor switches these data<br />
and control lines between the cassette and RS423 interfaces. The serial<br />
processor also provides data separator and sinewave synthesis circuits<br />
for the cassette recorder as well as a means of detecting the presence<br />
of the incoming tone from the recorder. [See section 3.5]<br />
The next section is the analogue input port which is a four channel 12<br />
bit converter which is discussed in more detail in section 3.9 and the<br />
interfacing survey (see chapter 7).<br />
In the NW corner is the Econet section which centres around a 68B54<br />
Advanced Data-Link Controller (ADLC). This is a sophisticated serial<br />
communications device allowing the sending and receiving of data at a<br />
variety of speeds between as many as 254 computers. The data transfer<br />
is synchronised by a clock signal fed to all the computers as a<br />
differential signal on one pair of cables, whilst the data itself uses<br />
another pair of cables. Data is both transmitted and received on the<br />
same pair of cables, but obviously only one computer at a time is able<br />
to "broadcast" onto the data highway. [See section 3.12]<br />
7
There are two 6522 versatile interface adaptors (VIA) on the PCB (one<br />
on the model A), the first being used mainly for internal control and<br />
the second for external interfacing. VIA-A is used both for control of<br />
internal hardware and also for generating interrupts from various<br />
devices such as the ADC and the keyboard. Of its two internal timers,<br />
the first is used for generating regular interrupts at one centisecond<br />
intervals and the second is used occasionally by the operating system.<br />
[See section 3.6]<br />
Of the two ports on this VIA, PA is used to provide a slow (1 MHz) data<br />
bus for the sound and speech chips and also for the keyboard, whilst PB<br />
is used to provide control lines for various functions throughout the<br />
circuit board. The sound is produced by a four-channel sound generator<br />
chip (SN76489) whilst the speech is produced by a TMS 5220 which can<br />
get its data either from RAM through VIA-A or from a serial ROM, the<br />
TMS 6100. This facility for accessing serial ROMs is also used to<br />
provide an external serial ROM facility on the keyboard. [See sections<br />
3.7 and 3.8]<br />
Moving down to the SW corner we have the disc controller interface<br />
based on an 8271 floppy-disc controller. This is responsible for<br />
sending out the command signals for a floppy disk drive, and for<br />
reading and writing the data from and to the disk drive. [See section<br />
3.10]<br />
The next device is VIA-B, referred to as the external VIA, which is<br />
used to provide interfaces for a printer and user applications. It also<br />
has two timers which are available to the user for his own applications<br />
programs. [See section 3.11]<br />
The last two sections of the circuit board are the 1 MHz extension bus<br />
and the TUBE. These provide two different ways of accessing various<br />
external devices. The 1 MHz bus is available for more general use but<br />
works at the slower speed of 1 MHz, whilst the TUBE works at the full 2<br />
MHz but is only intended for use with second processors. [See section<br />
3.13]<br />
8
3. Detailed Circuit Description<br />
3.1 Processor + clock circuitry + reset circuitry<br />
The microprocessor is a 6502A and runs at either 1 or 2 MHz. Most<br />
processing is done at 2 MHz, including accesses to the RAM and ROM, but<br />
the processor slows down to 1 MHz when addressing slow devices, viz.<br />
the 1 MHz extension bus, the ADC, the two VIA's, the 6845 CRT<br />
controller, the ACIA, and the serial processor. Clock signals for the<br />
microprocessor are produced by a 16 MHz crystal oscillator (IC43) in<br />
conjunction with divider circuitry in part of the video processor (IC6)<br />
which produces 8, 4, 2 and 1 MHz signals. The 1 MHz signal coming<br />
directly from the video processor is only used for the Teletext<br />
generator chip, whilst a D-type flip-flop (half of IC34) divides the 2<br />
MHz clock signal in order to produce the system 1 MHz clock (1 MHzE). A<br />
2 MHz signal of suitable phase is produced at the output of another Dtype<br />
(half of IC31) which remembers when a 1 MHz cycle has been<br />
requested. At the appropriate time, as governed by the 2 MHz clock, one<br />
of the 2 MHz clock cycles is masked off by the D-type (half of IC34)<br />
and when this happens the D-type that remembered that a request had<br />
been made, is cleared. Depending on the phase relationship between the<br />
1 and 2 MHz clocks at the time of the request, the delay on the 2 MHzE<br />
clock is different as illustrated by the diagrams below. The following<br />
simple program will produce these conditions alternately, so that they<br />
may be viewed with an oscilloscope.<br />
10 P%=&3000<br />
20 [ SEI<br />
30 .start<br />
40 STA &FC00<br />
50 STA &FC00<br />
60 JMP start<br />
70 ]<br />
80 CALL &3000<br />
9
A 555 timer circuit (IC16) provides a reset signal both at power up and<br />
also when the BREAK key is pressed. There is also a separate reset<br />
circuit using a CR combination from the +5 volt power supply (C10 and<br />
R20 and D1), to provide a signal called Reset A which is fed to IC3,<br />
the internal VIA. The idea is that although the 555 timer produces a<br />
general reset at power up or when the BREAK key is pressed, Reset A<br />
goes low only on power up. By interrogating the interrupt register on<br />
IC3 on the occurrence of a general reset, the microprocessor can<br />
discover Whether it was a "cold start", ie power up, or a "warm start",<br />
ie the BREAK key has been pressed when the system has already been in<br />
use for some time.<br />
3.2 Memory and address decoding<br />
31 1/4 Kbytes of ROM are catered for in the address map. 15 1/4 Kbytes<br />
of this ae contained in the operating system (IC51). This is in fact a<br />
16K device but 3/4K of it is left unused and it is in this area that<br />
the I-0 device memory map is situated. Four other ROMs (ICs 52, 88,<br />
100 and 101) are on the main circuit board. They may all be 16 Kbyte<br />
devices, in which case any one of them may be switched into the 16<br />
Kbyte space in the memory map by writing to the ROM select latch (IC76)<br />
. Alternatively, four 4 Kbyte ROMs may be in these four sockets in<br />
order to fill the 16 Kbyte space assigned. In this case, a two line to<br />
four line decoder (half of IC20) is used to select which of the four<br />
devices is being addressed by the address lines Al2 and A13. Mixtures<br />
of these two cases are allowed for, for instance two pairs of 8 Kbyte<br />
ROMs, one pair or the other being selected by the ROM select latch and<br />
then the ROM to be used in each pair being selected by the 2-4 line<br />
address decoder. Address decoding for the ROMs is by IC21 which decodes<br />
memory addresses &8000 to &C000 and &C000 to &FFFF. Locations from 0 -<br />
&7FFF are assigned to the dynamic RAM, and this is decoded by feeding<br />
A15 into pin 4 of IC21. All the rest of the hardware is mapped within<br />
locations &FC00 to &FEFF. This is decoded by IC22, whilst ICs 20 and 25<br />
are used to mask off the ROM over this range of addresses. ICs 24 and<br />
26 decode the individual devices within this range, some of which are<br />
read or write only. IC23 detects when a slow 1 MHz device is being<br />
addressed and it calls for the 6502 to execute a slow clock cycle.<br />
Note that in early versions of the <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong>, the operating<br />
system was contained within 4 EPROMs in IC positions 52, 88, 100 and<br />
101 while the BASIC interpreter was located in IC51. This arrangement<br />
is abnormal and has been phased out. Refer to the link selection survey<br />
(5.1) for more detailed information on this.<br />
10
3.3 CRT controller + video processor + Teletext hardware<br />
Random Access Memory on the <strong><strong>Micro</strong>computer</strong> is provided by either 8 or 16<br />
dynamic memory devices (ICs 53-68). These devices store 16K bits each<br />
and therefore in the Model B, the data inputs and outputs of one pair<br />
of devices are paralleled for each of the 8 data bits, DO to D7. To<br />
address 16K bits requires 14 address lines, and this is achieved on the<br />
4816 by having 7 inputs and latching in the addresses in two halves by<br />
using a row address strobe (RAS) and a column address strobe (CAS). Two<br />
octal buffers (81LS95) have to be used to multiplex the appropriate<br />
processor address lines onto the RAM address lines. (ICs 12 and 13).<br />
However, the 6845 CRT controller (IC2) also needs to access the RAM,<br />
and what is more, it accesses it differently depending on whether it is<br />
working in the Teletext mode or in one of the other graphics modes.<br />
Therefore two more pairs of octal buffers are used, ICs 10 and 11 for<br />
the Teletext mode, and ICs 8 and 9 for the other modes, the main<br />
difference being that in these modes the three least significant<br />
address bits are produced by the character row address lines from the<br />
CRTC in order to give the bit-mapping of the characters in the RAM<br />
memory rather than having the ROM character generator as in the<br />
Teletext mode.<br />
12
The 6502 microprocessor runs from a constant clock and so its<br />
requirements for memory access are predictable. Every 250 nanoseconds,<br />
control of the RAM address lines is switched between the microprocessor<br />
and the CRTC. Thus, in each one microsecond period, the microprocessor<br />
has two RAM accesses and the CRTC has two RAM accesses. Because the<br />
CRTC generates a sequence of addresses in order to refresh the VDU<br />
display, all the row address lines of the RAMs are constantly cycled.<br />
The addressing methods have been designed so that in each screen mode<br />
the dynamic RAMs are automatically refreshed by virtue of the<br />
sequential CRTC accesses.<br />
13
The row address strobe signal is produced by a D-type flip-flop<br />
connected to the 8 and 4 MHz clock signals (half of IC44). This RAS<br />
signal then drives all of the dynamic RAMs via R106. The two banks of<br />
RAM are enabled by virtue of having their column address strobes<br />
individually available. in model A computers, with only one bank of<br />
RAM, CAS 1 is used. In the model B, CAS 0 controls the lower 16K and<br />
CAS 1 the upper 16K. The second bank of RAMs is selected by a 74LS51<br />
circuit (half of IC28) which controls the ,74S139 (half of IC45)<br />
producing the CAS signals. When A14 is high the B input is low thus<br />
selecting CAS 1. The other half of IC45 is used to select between the<br />
processor and CRT address lines.<br />
Using this technique, two bytes of information are available per<br />
microsecond for refreshing the raster scanned video display. With each<br />
horizontal line having a period of 64 microseconds, a 40 microseconds<br />
active display area is usual. Thus, 640 bits (2 bytes x 8 bits x 40<br />
microseconds) of information per horizontal line are produced from the<br />
memory-mapped display. At the end of each 250 nanosecond CRTC access<br />
period, the video processor (IC6) latches the byte from the RAM and,<br />
according to the display mode in operation, serialises the byte into a<br />
single bit stream of 8 bits, or two bit streams of 4 bits or four bit<br />
streams of 2 bits. In this way, display modes varying from 640 pixels<br />
in 2 logical colours to 160 pixels in 16 logical colours can be<br />
produced.<br />
14
The video processor contains a piece of high speed (16MHz) static RAM<br />
called a palette. This memory can be programmed to define the<br />
relationship between the logical colour number produced by the RAM and<br />
the physical colour which will appear on the display. Note that the<br />
information in the main RAM is unchanged by changing the palette; it is<br />
its interpretation into physical colours which changes. Modes 0 to 6 in<br />
the <strong><strong>Micro</strong>computer</strong> use software generated characters, that is to say,<br />
the character font to be produced on the screen is held in the memorymapped<br />
display area of the RAM so that graphics and/or characters may<br />
be held. The definition of these characters is stored in the operating<br />
system ROM from 0000 to C2FF.<br />
15
The speed of printing on the screen is much increased by the use of<br />
hardware scrolling. There is a register in the CRTC which is used to<br />
define the start of screen address in the screen memory. Thus in order<br />
to scroll the screen, it is only necessary to increment this register<br />
by the number of characters per line and then write to the memory<br />
address where the last screen data was. The number of address lines<br />
from the CRTC, used to address the screen memory, has to be sufficient<br />
to cater for the biggest screen (20 Kbytes). Thus 14 address lines have<br />
to be used which means that when using the hardware scrolling<br />
technique, the picture scrolls around in 32 Kbytes. Consider a scroll<br />
of 8 Kbytes in a 20 Kbyte screen. The original start of screen for the<br />
20 Kbyte mode was &3000. After an 8 Kbyte scroll, the current start of<br />
screen address is &5000 with the end of the screen as seen by the CRTC<br />
at &5000 plus 20 Kbytes, which comes to &9FFF, as illustated below.<br />
16
Since there is only 32 Kbytes of RAM this would mean that instead of<br />
accessing addresses &8000 to &9FFF you would be accessing locations<br />
&0000 to &1FFF. Therefore when the address produced by the CRTC is<br />
greater than &7FFF (ie MAl2 = 1) you have to add to the address from<br />
the CRTC, a number which will bring the actual address back up to the<br />
area of RAM which is currently being used for the screen ie above<br />
HIMEM. Thus for numbers greater than &7FFF you simply add the number<br />
&3000 which brings the addresses back to the range &3000 to &4FFF, as<br />
illustrated in the diagram above. In the 20K modes you add &3000 (=12K)<br />
, in the 16K mode you add &4000 (=16K), in the 10K mode you add &5800 (<br />
=22K) and in the 8K mode you add &6000 (=24K). This number to be added<br />
is defined by the control lines CO and Cl from the 74LS259 (IC32), and<br />
computed by some AND gates with the result being added to the higher<br />
CRTC refresh address lines by a 74LS283 adder (IC39). The CRTC address<br />
line MAl2 is used as a "carry" to determine whether zero or the number<br />
computed by the AND gates is added to the address lines. (Confusion may<br />
arise when looking at 1C 9 on the circuit diagram since it looks as if<br />
AA0 to AA2 are being buffered to AO to A2. But if you look at the pin<br />
numbers and compare them with the other 81LS95's you will see that they<br />
are in fact buffered to the top three bits, A4 to A6. MA4 to MA7 are<br />
buffered to AO to A3.)<br />
Display mode 7 is a Teletext mode and to implement this an SAA 5050 (<br />
IC5) Teletext character generator Read Only Memory is used. IC15<br />
latches the information coming from the RAM prior to the SAA 5050. When<br />
using this mode, only 1K of RAM is devoted to the display memory and<br />
the characters are held within it as ASCII bytes. The SAA 5050 then<br />
translates these bytes into a standard Teletext/Prestel format display.<br />
A 6 MHz clock signal is required for the Teletext character generator (<br />
IC5). This signal is produced by knocking a reset flip-flop (two<br />
quarters of IC40) backwards and forwards from the 8 MHz and 4 MHz clock<br />
signals. The output of this flip-flop is then itself inverted according<br />
to the state of the 2 MHz clock signal by an exclusive OR gate (1/4 of<br />
IC38). Glitches on this output are removed by R119 and C48 to produce<br />
the 6 MHz clock signal at Pin 8 of IC37.<br />
17
The CRTC is still used to generate the RAM addresses even in the<br />
Teletext mode, but using only 1K means that only 10 address lines are<br />
needed hence the top four address lines on the 81LS95 (IC11) are tied<br />
to logic 1. The Teletext mode is selected by setting the value of video<br />
address start (registers 12 and 13 in the CRTC) so high that an extra "<br />
carry" is generated on MA13. This is used to enable ICs 10 and 11,<br />
disable ICs 8 and 9 and also enable the data latch (IC15).<br />
18
3.4 RGB + PAL encoder + UHF output _<br />
The red, green and blue logic signals -produced by the -_video<br />
processor are buffered by transistors Q4, Q5 and Q6 and fed out<br />
together with a composite sync signal to the RGB connector (SK 3). The<br />
red, green and blue lines are summed together by binary weighted<br />
resistors to feed Q7 which produces a 1V composite video signal<br />
suitable for feeding to monochrome monitors, on which the different-<br />
colours will appear as different shades of grey. Also available, from<br />
the main printed circuit board, is a UHF TV signal on channel 36,<br />
suitable for feeding to the aerial input of a domestic television. This<br />
output is modulated using a UM1233 for PAL. Colour is provided for<br />
domestic televisions by a PAL (phase alternating line) encoder circuit<br />
which modulates the colour information on to the colour subcarrier -<br />
frequency. Q10 is a 17.73 MHz oscillator circuit which is divided by a<br />
ring counter (IC46) giving 2 outputs at the colour subcarrier frequency<br />
of 4.433618 MHz. One of these two outputs is switched by the horizontal<br />
line frequency in order to produce the alternate phase on each TV line.<br />
Thus on IC46 pin 9, we have the 'U' signal and on IC48 pin 11, the '+/-<br />
V' signal. A row of exclusive OR gates is used to select different<br />
phases of the 'U' and 'V' signals according to whether a red, green,<br />
blue, cyan, magenta or yellow colour is to be produced. These signals<br />
then drive resistors via a row of NAND gates in order to produce the<br />
colour subcarrier signal which is added to the luminance output from Q8<br />
by the buffer Q9. In order for the receiving television to interpret<br />
the colour information, a reference colour burst has to be provided at<br />
the beginning of each line. A burst gate pulse of approximately 5uS<br />
immediately after the horizontal sync pulse for each line is produced<br />
at pin 4 of IC41, and it is timed by C45 and R109. This burst gate<br />
allows through a standard colour subcarrier signal which the television<br />
uses as its reference for the rest of- that line. The PAL signal may be<br />
added to the 1V video connector, with the addition of a 470 pF<br />
capacitor between the emitter of Q9 and the base of Q7. This is<br />
provided as a link selectable option on later issues of the PCB (issue<br />
4 on). In modulated PAL, diodes D20, 21 and 22 increase the luminance<br />
of the darker colours, eg blue, in order to make coloured text displays<br />
more readable.<br />
3.5 Cassette + RS423 + serial processor<br />
For both the cassette and RS423 interfaces, a 6850 asynchronous<br />
communications interface adaptor (ACIA) (IC4) is used to buffer and<br />
serialise or deserialise the data. The serial processor (IC7),<br />
specifically designed for the <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong>, contains two<br />
programmable baud rate generators, a cassette data/clock separator,<br />
switching to select either RS423 or cassette operations and also a<br />
circuit to synthesise a sinewave to be fed out to the cassette<br />
recorder. IC42 divides the 16 MHz clock signal by 13 (1.23 MHz) and<br />
this signal is divided further (by 1024) within the serial processor to<br />
produce the 1200 Hz cassette signal. Automatic motor control of an<br />
audio cassette recorder is achieved by using a small relay driven by a<br />
transistor (Q3) from the serial processor. The signal coming from the<br />
cassette recorder is buffered, filtered and shaped by a three stage<br />
amplifier (IC35). The RS423 data in and data out signals and the<br />
request to send output (RTS) and clear to send input (CTS) signals are<br />
interfaced by ICs 74 and 75 which translate between TTL and standard<br />
RS423/232 signal levels (+5V and -5V). The control register, which is<br />
memory-mapped at &FE10, specifies the frequencies for the transmit<br />
clock (bits 0-2) and the receive clock (bits 3-5) used by the 6850 (<br />
IC4). The switching between the cassette and RS423 inputs and outputs<br />
19
is also determined by the control register (bit 6), and so is the motor<br />
control (bit7). R75 and C28 provide the necessary timing elements for<br />
delay between receiving the high tone run-in signal and asserting the<br />
data carrier detect signal to the ACIA. The value of resistor needed is<br />
affected by the output impedance of that pin on the serial. processor<br />
which has been subject to a certain amount of variation. Thus the value<br />
of R75 has changed through the evolution of the circuit.<br />
20
3.6 Internal VIA<br />
One 6522 VIA device (IC9) is devoted to internal system operation. Port<br />
B drives an addressable latch (IC32) which is used to provide read and<br />
write strobe signals for the speech interface, the keyboard and the<br />
sound generator chip. Also coming from this latch are control lines CO<br />
and Cl which provide the memory address addition for the CRT controller<br />
depending on the amount of RAM devoted to the display memory. Pins 6<br />
and 7 of the addressable latch drive the capitals lock and shift lock<br />
LEDs on the keyboard. The rest of Port B on the internal system VIA is<br />
used to input the two "fire button" signals from the analogue to<br />
digital convertor interface and two response lines from the speech<br />
interface. Each time the system VIA is written to, any changes on Port<br />
B which should affect the addressable latch are strobed into it by a<br />
flip-flop (IC31) which is triggered from the 1 MHz clock signal. Port A<br />
of this VIA is a slow data bus which connects to the keyboard, the<br />
speech system chip and the sound generator.<br />
3.7 Keyboard'`<br />
The keyboard circuit (<strong>Section</strong> 9.5) connects via PL 13. A 1 MHz clock<br />
signal is fed to a 74LS163 binary counter, the outputs of which are<br />
decoded by a 7445 decoder driver circuit. These outputs drive the rows<br />
of the keyboard matrix, each row being driven in turn. If any key is<br />
depressed, the 74LS30 gate will produce an output when that row is<br />
strobed and this will interrupt the computer through line CA 2 of IC3.<br />
On this interrupt, the computer will enter the key reading software. In<br />
order to discover which key was pressed, the microprocessor loads<br />
directly into the 74LS163 the address of each key matrix row allowing<br />
it to interrogate each row in turn. Also, the microprocessor loads into<br />
a 74LS251 data selector, the address of each specific key on that row.<br />
ie column addresses. In this way, the microprocessor can interrogate<br />
each individual key in turn until it discovers which one was depressed<br />
and causing the interrupt. Once read, the keyboard assumes its free<br />
running mode.<br />
3.8 Sound + speech + serial ROM interfaces<br />
The speech system device used is a TMS 5220 (IC99) which, on<br />
instructions from the <strong>Micro</strong>processor, will either produce at its audio<br />
output speech from its associated memory (IC98) or from speech data fed<br />
to it directly from the <strong><strong>Micro</strong>computer</strong>'s memory. On later issue boards a<br />
variable resistor is provided (VR 2) to adjust the clock frequency to<br />
give the best effect of the speech. IC18 is a four channel sound<br />
generator chip which may be programmed to give varying frequency and<br />
varying attenuation on each channel. The audio output of the speech<br />
system device is filtered by an operational amplifier circuit with a<br />
cut-off frequency of 7 kHz. This signal is then added to an amplified<br />
and level shifted signal from the sound generator by a virtual earth<br />
amplifier to which is also added an extra analogue input from the 1 MHz<br />
extension bus. This summated audio signal is then finally filtered by<br />
an 8 kHz low pass filter. All of these operations are done by a quad<br />
operational amplifier (IC17). IC19 provides audio power amplification<br />
to drive a speaker from PL15. A low level audio output is provided from<br />
PL16 for feeding the auxiliary input of an external power amplifier.<br />
21
3.9 A to D convertors<br />
A four channel analogue to digital convertor facility is provided by<br />
IC73. This device connects straight to the <strong><strong>Micro</strong>computer</strong>'s data bus and<br />
is a dual slope -convertor with its voltage reference being provided by<br />
the three diodes, D6, D7 and D8. Each time a conversion is completed,<br />
the microprocessor is interrupted through CB1 of the internal VIA which<br />
responds by reading the value and storing it in a memory location.<br />
3.10 Disc interface<br />
IC78 is a floppy disc controller circuit which is used to interface to<br />
one or two, single or double sided 5 1/4 inch floppy disc drives. Logic<br />
signals from the controller to the disc drive are buffered by two open<br />
collector driver packages IC79 and 80. The incoming signal from the<br />
disc drive is first conditioned by monostable IC87 producing a pulse<br />
train with each pulse of fixed width. These pulses are then fed to the<br />
data separation circuits ICs 81 and 82. These form a digital<br />
monostable. 1C86 divides the 8 MHz clock signal down to 31.25 kHz. ICs<br />
83, 84 and 85 are then used to detect index pulses coming in from the<br />
drive which show that the drive is ready for a read or write operation.<br />
3.11 Printer + user port interfaces<br />
1069 is a versatile interface adaptor. Port A is used to provide a<br />
centronics standard parallel printer interface, with an octal buffer,<br />
IC70, to improve on the current driving capabilities of the data lines.<br />
Control line CA2 is used as the strobe line having been buffered by<br />
part of IC27 and Q11. It is asserted low for approximately 5uS to<br />
signal that the data is ready. This circuit has been changed on the<br />
various issues of the PCB as explained in section 4.4.<br />
Port B is left uncommitted and is free for user applications as either<br />
input or output. For full details of what can be done with the user<br />
port you should refer to the 6522 data sheet, but basically, apart from<br />
being used as a straightforward input/output port, PB7 can be used as a<br />
programmable pulse output using one of the timers, PB6 can be used as<br />
an input to the other timer for pulse counting, and CB1 and CB2 can be<br />
used for automatic hand-shaking and in conjunction with the VIA's own<br />
shift register.<br />
22
3.12 Econet<br />
ICs 89 to 96 are concerned with the Econet interface. IC89 is an<br />
Advanced Data Link Controller Circuit, type 6854 which handles the<br />
Econet protocol. Data to be transmitted on to the network is fed from<br />
the ADLC to the line drive circuit (IC93) via an inverting Schmitt<br />
trigger circuit (part of IC91). Transmit data then goes through the<br />
line driver circuit which produces a differential signal drive to the<br />
Econet cables. Received data is detected and converted to a logic<br />
signal by one half of IC94 which is a dual comparator circuit, type<br />
LM319. The received data is then fed back to the data link controller<br />
circuit.<br />
An Econet installation has a single master clock station which provides<br />
the clock for the whole of the network. This clock signal is<br />
transmitted around the network as a second differential line signal and<br />
it is used to clock the data in and out of the data link controller<br />
circuits. The network clock is detected using the other half of IC94,<br />
and the detected clock signal is then fed to both receive clock and<br />
transmit clock inputs on the 6854. In the presence of a network clock,<br />
the monostable circuit (IC87) is permanently triggered and thus<br />
providing a data carrier detect signal for the data link controller<br />
chip. Once the network clock is removed, the monostable immediately<br />
drops out and the data carrier is no longer detected.<br />
The Econet is a broadcast system on which a number of stations may<br />
attempt to transmit their data over the network at any given time. In<br />
this case, a situation called a collision can occur and then the<br />
transmitting stations should detect the collision and back off before<br />
trying again to transmit over the network. Collision arbitration<br />
software is included in the Econet system and is based on the station<br />
ID number. Collisions on the network data lines result in the<br />
differential signal on the two data wires being reduced and this<br />
condition is detected by IC95 which is another dual comparator circuit.<br />
When there is a good differential data signal on the network one output<br />
of IC95 or the other will be low, in which case the output of IC91 pin<br />
6 will be high, indicating no collision. When there are no collisions<br />
on the network, and the network clock is detected by the clock<br />
monostable, the data link controller is clear to send data over the<br />
network. When there is a collision on the network both outputs of IC95<br />
will go high and the clear to send condition will cease. Note that when<br />
the computer is not connected to the network a collision-like situation<br />
results, in which case again the data link controller will not get a<br />
clear to send condition.<br />
Up to 254 stations may be connected to each Econet with each station<br />
being indentified by a unique station identification number. This<br />
station ID is programmed on the links S11 and the ID can then be read<br />
by the octal buffer IC96. The data link controller circuit produces<br />
interrupts which are fed to the processor's NMI line. These interrupts<br />
can be enabled and disabled under software control by using the<br />
address-decoded signals, INTOFF which is achieved by reading the<br />
station ID at &FE18, and INTON which is generated by reading &FE20. (<br />
Writing &FE20 loads the Video processor register.)<br />
23
3.13 1 MHz bus<br />
The address and data lines, AO - A7 and DO - D7, together with two page<br />
select lines are available as the 1 MHz extension bus to which various<br />
peripheral devices may be connected, eg Teletext interface. All<br />
accesses to this bus will be at a 1 MHz processor speed, although links<br />
are, provided to increase this to 2 MHz if desired (see the selection<br />
link survey). The octal buffer (IC71) and the octal transceiver (IC72)<br />
are used to interface these signals to the internal data and address<br />
buses, IC72 being enabled only when either "FRED" or "JIM" is accessed<br />
(pages &FC00 and &FD00).<br />
3.14 Power supply<br />
The power supply unit produces 5 volts at 3.75 amps and -5 volts at 100<br />
milliamps for use on the main circuit board. Some auxiliary power for<br />
accessories is also available on an external connector and this<br />
includes +12 volts at 1.25 amps, but the amount of power avalable<br />
depends on what hardware is connected internally - Econet, disc<br />
interface, sideways ROMs etc.<br />
The power supply connects to the main circuit board by seven push-on<br />
connectors with the +5 volts being fed to three different points across<br />
the main circuit board. These points are all connected together<br />
electrically. However, by distributing the power in this way the need<br />
for very large copper tracks to distribute power around the board is<br />
avoided. Most computers in production will have a switched-mode power<br />
supply, the circuit diagram for which is given. However it is not<br />
recommended that attempts should be made to repair this power supply,<br />
instead it should be treated as a module to be exchanged. This is<br />
because of the stringent safety regulations relating to such units. A<br />
small number of early computers have a linear power supply unit with a<br />
conventional mains transformer and regulator circuit. These also should<br />
be treated as modules to be exchanged rather than serviced, though it<br />
should be noted that the three outputs are from separate regulators,<br />
thus it is possible for power to appear say on two out of the three<br />
pairs of connectors.<br />
24
4 Upgrading the PCB<br />
In these instructions about how to add extra hardware to the PCB for<br />
disc, Econet, speech etc, some differences may occur depending on which<br />
hardware is already fitted. This is made clear within each set of<br />
instructions. In order to locate the positions of various of the<br />
selection links, reference should be made to section 5.2 which gives<br />
the X-Y coordinates of each link. Dealers and service centres<br />
performing these upgrades must also conform to upgrade procedures and<br />
requirements as notified by their supplier, and should refer to any<br />
available information updates for latest details.<br />
4.1 Modification A<br />
Convert from EPROM MOS to ROM MOS<br />
i) Remove the four MOS EPROMs from their sockets IC52, IC88, IC100 and<br />
IC101.<br />
ii) Remove the BASIC ROM from the IC51 socket and replace it in the<br />
IC52 socket.<br />
iii) Insert the MOS ROM into the IC51 socket.<br />
iv) Set the following link positions using MOLEX jumpers (if fitted or,<br />
tinned copper wire):-<br />
S18 - North<br />
S19 - East<br />
S20 - North<br />
S21 - 2 x East/West<br />
S22 - North<br />
S32 - West<br />
S33 - West<br />
v) Test using a FIT and, if available, a PET (see section 6.2).<br />
4.2 Modification B<br />
Convert Model A to Model B<br />
i) The following parts are required:-<br />
8 off 4816AP-3 IC61 to 68<br />
1 off 6522 IC69<br />
2 off 74LS244 IC70, 71<br />
1 off 74LS245 IC72<br />
1 off uPD7002 IC73<br />
1 off 88LS120 IC74<br />
1 off DS3691 IC75<br />
1 off 74LS163 IC76<br />
1 off 74LS00 IC77<br />
1 off 6-pin DIN socket MAB6H SK3<br />
1 off 5-pin DIN socket MAB5WH SK4<br />
1 off 15-way D-type socket 164801-1 SK6<br />
2 off 34-way header 3431-1302 PL8, PL11<br />
1 off 26-way header 3429-1302 PL9<br />
1 off 20-way header 3428-1302 PL10<br />
1 off 40-way header 3432-1302 PL12<br />
25
ii) Insert the above ICs into the sockets provided on the main<br />
circuit board. Solder the connectors on to the printed circuit board.<br />
iii) Cut the wire links at link positions S12 and S13. Move the MOLEX<br />
link at position S25 from South to North.<br />
iv) On issue 1, 2 or 3 circuit boards only, add a 2k2 ohm resistor<br />
between PL9 pin 1 and +5v on the solder side of the circuit board using<br />
a resistor with sleeved leads. +5v is available at IC85, pin 16 (33 mm<br />
due North of pin 1).<br />
v) On issue 1, 2 or 3 circuit boards only, cut the track connected to<br />
PL9 pin 23 (this may have previously been cut), then link IC69 pin 40<br />
to PL9 pin 19. This modification may have been made, and, if so, a<br />
check should be made to ensure that it has been correctly performed.<br />
vi) On issue 1 and 2 circuit boards only, PL9 pin 26 should be cut out<br />
of the header. Care should be taken to ensure that the pin is cut right<br />
back so that no connection can be made to it.<br />
vii) On issue 1 and 2 circuit boards only, a BC239 transistor should be<br />
added in place of link S1 as follows:- Cut the track between the centre<br />
and South pins of S1 on the solder side of the circuit board. Cut the<br />
two tracks connected to the North pin of S1 on the solder side of the<br />
circuit board, then reconnect the ends of these tracks leaving the<br />
North pin isolated. Insert a BC239 transistor into the S1 position with<br />
the base in the South pin, the emitter in the North pin, and the<br />
collector in the centre pin. Finally, link the North pin of S1 to IC27<br />
pin 7 with a short length of insulated wire.<br />
viii) On issue 1 or 2 circuit boards only, add a 4k7 ohm resistor (<br />
R162) between the existing two holes located approximately 5 mm East of<br />
IC70 pins 11 and 13, as shown below.<br />
26
ix) On issue 1 circuit boards only, disconnect the LPSTB signal between<br />
IC69 pin 18 and PL10 pin 2 by cutting the track on the solder side of<br />
the circuit board which is connected to IC69 pin 18.<br />
x) Test using a FIT and, if available, a PET.<br />
4.3 Modification C<br />
Add Speech Option<br />
i) The following components are required:-<br />
1 off Integrated Circuit TMS6100 IC98<br />
1 off Integrated Circuit TMS5220 IC99<br />
ii) On issues 2 and 3, the following modifications are needed.<br />
On the component side of the main PCB:<br />
- Cut the track between IC3 pin 16 and the through-hole 8mm to the<br />
west.<br />
- Cut the track between IC3 pin 17 and the through-hole 10mm to the<br />
west.<br />
On the solder side of the PCB:<br />
- Link the through-hole 10mm to the west of IC3 pin 17 to IC3 pin 16<br />
- Link the through-hole 8mm to the west of IC3 pin 16 to IC3 pin 17.<br />
(These operations switch the signal lines to IC3 pins 16 and 17.)<br />
Then, also on the solder side of the PCB:<br />
- Cut the track between IC98 pins 13 and 14.<br />
- Link IC98 pin 13 to PL14 pin 3 (0 volts).<br />
iii) Issue 1 keyboard PCBs also need modifying as follows:-<br />
On the solder side of the PCB, cut the track between pins 14 and 15 of<br />
the edgecard connector. The pins are those furthest from the speaker. (<br />
ie further east).<br />
On the solder side of the PCB, link pin 14 of the edgecard connector to<br />
0 volts. This can be found on either of the capacitor legs nearer the<br />
centre of the PCB.<br />
iv) When the modifications are complete, procede as follows:-<br />
Reconnect the keyboard to the main PCB. Add the new connector for PL14,<br />
then, with the computer turned off, test for continuity between the<br />
following points:<br />
27
Edge connector pin number |6|7|8|9|10|11|12|13|14|15|<br />
1C98 pin number |1|3|4|5| 6| 7|10|11|13|14|<br />
Note: On the edge connector, pin 1 is nearest the speaker, thus the<br />
polarising key is pin 3 and pins 4 and 5 are "empty".<br />
Also check that there are no short-circuits between any of the edge<br />
connector pins. Repeat the tests for the other edge connector.<br />
v) Insert ICs 98 and 99, turn the machine on and type:<br />
REPEAT SOUND-1,GET,0,0:UNTIL0 <br />
Now press any alphanumeric key and you should hear the voice synthesis<br />
operating. If the pitch is wrong, follow the instructions in vi) below.<br />
If there is no speech, double check the modifications and try again.<br />
vi) The pitch of the speech must be set. From Issue 4 PCBs onwards this<br />
is a simple matter of adjusting VR2 which is situated just west of<br />
IC98. On Issue 1, 2 and 3 PCBs, the resistor R32 (between ICs 98 and<br />
99) may need to be changed to achieve the best result. The method for<br />
setting the pitch is to connect a frequency meter to pin 3 of IC99 and<br />
to adjust VR2 until the meter reads 160 kHz (+ or - 100 Hz), or as<br />
close as is obtainable by changing R32.<br />
vii) Reassemble the machine. Before fitting the ROM socket cover into<br />
the<br />
the case lid, remove the rforated section of the black label above the<br />
ROM sockets. It may be necessary to trim the label to match the case<br />
cutout. For early version cases (without a rib on the underside behind<br />
the keyboard cutout), remove the two small lugs on the ROM socket cover<br />
before fitting.<br />
viii) Test using a FIT and, if available, a PET.<br />
4.4 Modification D<br />
Add 5 1/4 inch Disc Interface to Basic Model B<br />
i) The following parts are required:-<br />
1 off 8271 IC78<br />
2 off 7438 ICs 79,80<br />
1 off 74LS10 IC82<br />
2 off 74LS393 ICs 81,86<br />
2 off CD4013B ICs 83,84<br />
1 off CD4020B IC85<br />
1 off 74LS123 IC87 (Not required if Econet already fitted)<br />
1 off 2764 EPROM (DFS) IC88 (or IC100 if Econet fitted; but not<br />
required if DNFS already fitted)<br />
ii) Insert the ICs listed above into the sockets provided on the main<br />
circuit board.<br />
iii) On issue 1 or 2 circuit boards only, connect the two pads of link<br />
position S8 with a wire link.<br />
28
iv) If the MOS ROM version 0.1 is fitted in position IC51 then it<br />
must be replaced by a 1.2 MOS, see modification A.<br />
v) If the existing power supply does not incorporate an auxiliary power<br />
output socket it must be exchanged for a suitable unit (eg ASTEC type).<br />
vi) On issue 1, 2 or 3 circuit boards only, cut the leg of IC27 pin 9<br />
as close to the PCB as possible and the track connected to it on the<br />
component side of the circuit board between IC27 and IC89, then<br />
reconnect the cut IC leg to the East pad of link S9 with a short Length<br />
of insulated wire.<br />
vii) On issue 4 boards onwards, cut the TCW link at position S9.<br />
viii) Set the following link positions using MOLEX jumpers:-<br />
S18-North<br />
S19-East<br />
S20-North<br />
S21-2 x East/West<br />
S22-North<br />
S32-West<br />
S33-West<br />
ix) Test using a FIT and, if available, a PET.<br />
4.5 Modification E<br />
Add Econet Interface to Model A<br />
i) The following parts are required:-<br />
5 off 14-pin DIL IC sockets<br />
1 off 20-pin DIL IC sockets<br />
1 off 28-pin DIL IC sockets<br />
1 off 74LS163 IC76 (already fitted on model B)<br />
1 off 74LS123 IC87 (Not required if disc already fitted)<br />
1 off 68B54 IC89<br />
1 off 74LS132 IC91<br />
1 off 75159 IC93<br />
2 off LM319 ICs 94,95<br />
1 off 74LS244 IC96<br />
1 off 74LS74 IC97<br />
1 off 10uF Tantalum Capacitor C18<br />
1 off 10uF Ceramic Capacitor C23<br />
1 off 5-pin 180 degree DIN socket SK7<br />
1 off 8X22K SIL resistor pack RP2<br />
1 off 2764 EPROM with NFS IC88 (not required if DNFS already fitted)<br />
2 off Rows of 8 MOLEX pins S11<br />
20 off 2% tolerance 1/4W resistors as follows:-<br />
R34-10k R40-100k R48-1k R62-56k<br />
R35-10k R41-100k R51-10k R63-56k<br />
R64-1M5 R44-1M5 R52-1k0<br />
R36-1M5 R45-10k R59-56k<br />
R38-100k R46-1k0 R60-56k<br />
29
R39-100k R47-1k5 R61-1k0<br />
ii) Solder all of the above passive components onto the main PCB.<br />
iii) Insert all of the above integrated circuits into their sockets.<br />
iv) Cut the wire links at link positions S2, S12 and S13. (S12 and S13<br />
should already have been cut on Model B's)<br />
v) Set the following link positions using MOLEX jumpers:-<br />
S18-North<br />
S19-East<br />
S20-North<br />
S21-2 x East/West<br />
S22-North<br />
S32-West<br />
S33-West<br />
vi) On issue 1, 2 or 3 boards only, the following modifications are<br />
requi red:<br />
Remove the capacitor C17 and replace it with a 2. 2nF capacitor. Cut<br />
the PCB track from IC26 pin 6 to IC96 pins 1 and 19 leaving the track<br />
from IC26 pin 6 to IC97 pin 2 intact. Cut the track from IC89 pin 26 to<br />
IC97 pin 4 and link IC26 pin 9 to IC96 pins 1 and 19 and also to IC97<br />
pin 4.<br />
vii) Test using a FIT and, if available, a PET.<br />
4.6 Modification F<br />
Add 8 inch disc interface to Model B<br />
(As Modification D - Add 5 1/4 inch disc interface, but add....)<br />
x) Set the following link positions by cutting the indicated PCB track<br />
and inserting a wire link.<br />
LINK CUT TRACK WIRE LINK.<br />
S4 East (Solder side) West<br />
S10 West (Component side) East<br />
S27 West (Solder side) East<br />
4.7 Partial upgrading<br />
If you want to upgrade a Model. A to enable it to run software intended<br />
for use with a model B, but do not want all the various interfacing<br />
facilities, then it is only really necessary to add the RAM and the<br />
6522 VIA and change link 525. The VIA is needed as some professional<br />
software uses its hardware timers.<br />
If you want to use sideways ROMs then you will need to add the 74LS163<br />
(IC76) and be sure that links S12 and S13 are cut.<br />
30
5 Selection links and circuit changes<br />
5.1 Selection Link Survey<br />
Here is a survey of the options which may be selected on the<br />
<strong><strong>Micro</strong>computer</strong> by selection links S1 to S39. These links may take the<br />
form of tracks on the circuit board which can be cut, soldered wire :<br />
inks, or shorting jumpers, plugging on to the rows of pins. This is<br />
followed by a tabular survey of the options selected in production on a<br />
standard model B <strong><strong>Micro</strong>computer</strong>.<br />
Option Select Links are as follows:-<br />
1. Used only on issue 4 and succeeding boards to select printer strobe<br />
or direct output from CA2.<br />
2. OPEN enables ECONET NMI<br />
CLOSED disables ECONET NMI<br />
- Do not fit this link with IC91 in place.<br />
3. Clock base frequency selection for ECONET<br />
Not used after issue 3.<br />
4. EAST selects 5 1/4" disc<br />
WEST selects 8" disc.<br />
- This changes the pin connection of the "side select" line on the<br />
disc interface.<br />
5. NORTH enables ECONET clock<br />
SOUTH disables ECONET clock.<br />
- Not used after issue 3.<br />
6. NORTH divides ECONET clock by 2<br />
SOUTH divides ECONET clock, by 4.<br />
- Not used after issue 3.<br />
7. WEST applies 4-5v to pin 30 of disc controller (IC78).<br />
EAST applies 0v to pin 30 of disc controller.<br />
- Readable by software, bit 0 of the result register of the 8271. Not<br />
used.<br />
8. CLOSED links disc head load signal to PL8.<br />
OPEN isolates disc head load signal from PL8.<br />
9. CLOSED disables DISC NMI.<br />
OPEN enables DISC NMI.<br />
Do not fit 1C78 with this link closed. Due to PCB faults, various.<br />
different modifications are necessary with different issue boards in<br />
order to use the disc interface. (See section 4, modification D.)<br />
31
10. WEST selects 5 1/4" disc.<br />
EAST selects 8" disc.<br />
- Changes the pin connection of the "index" line on the disc<br />
interface.<br />
11. Selects Econet station ID. (NORTH is LSB)<br />
- See Econet upgrade instructions - section 4, modification E.<br />
12. CLOSED ties ROM select line A to 0V.<br />
OPEN ROM select line A driven by IC76.<br />
- On model A's, IC76 is not fitted because sideways ROM'S are not<br />
used. ROM 0 (IC52) is permanently selected. Do not fit IC76 with this<br />
link closed.<br />
13. CLOSED ties ROM select line B to 0V at IC20.<br />
OPEN ROM select line B driven by IC76.<br />
- Do not fit IC76 with this link closed. See comments on link 12.<br />
14. CLOSED disables ROM output from page FD, enables JIM.<br />
OPEN enables ROM output from page FD, disables JIM.<br />
- If link 14 is open then link 15 must be closed and R72 must be<br />
fitted. The purpose of this link was to provide access to an extra page<br />
of the OS ROM for development purposes. It is unlikely to be used in<br />
production machines as it disables the 1MHz bus.<br />
15. CLOSED disables fast access to page FD via IC23.<br />
OPEN enables fast access to page FD via IC23.<br />
- Link 15 must be closed if link 14 is open and R72 must be fitted.<br />
See comments on link 14.<br />
16. CLOSED disables fast access to page FC via IC23.<br />
OPEN enables fast access to page FC via IC23.<br />
- Link 16 must be closed if link 17 is open and R73 must be fitted.<br />
See comments on link 14.<br />
17. CLOSED disables ROM output from page FC, enables FRED.<br />
OPEN enables ROM output from page FC, disables FRED.<br />
- If link 17 is open then link 16 must be closed and R73 must be<br />
fitted. See comments on link 14.<br />
18. SOUTH forces slow access to IC100 ROM.<br />
NORTH allows fast access to IC100 ROM.<br />
- To allow the use of 1MHz EPROMs.<br />
32
19. WEST forces slow access to ROMs IC52, IC88 and IC101.<br />
EAST allows fast access to ROMs IC52, IC88 and IC101.<br />
- Diodes D10, D11 and D12 may be selectively added to slow down ROMs<br />
IC101, IC88 and IC52 respectively when link 19 is in WEST position, but<br />
for any ICs to have slow access, R55 must be added.<br />
D10, 11 & 12 and R55 are not fitted from issue 7 onwards.<br />
20. SOUTH connects high ROM select bit to IC20 decoder from A 13.<br />
NORTH connects high ROM select bit to IC20 decoder from ROMSEL 1.<br />
21. 2 x NORTH/SOUTH selects blocks 8 to B in IC51 and blocks C to F in<br />
ICs 52, 88, 100, and 101. (4 EPROMs for OS)<br />
2 x EAST/WEST selects blocks C to F in IC51 and blocks 8 to B in ICs<br />
52, 88, 100 and 101. (OS in IC51)<br />
22. SOUTH connects low ROM select bit to IC20 decoder from A 12 .<br />
NORTH connects low ROM select bit to IC20 decoder from ROMSEL 0.<br />
23. OPEN RS 423 receiver not terminated (DATA).<br />
CLOSED RS 423 receiver terminated (DATA).<br />
24. OPEN RS 423 receiver not terminated (CTS).<br />
CLOSED RS 423 receiver terminated (CTS).<br />
25. SOUTH selects CAS 1 only, for 16K RAM configuration.<br />
NORTH selects CAS 0 and 1 for 32K RAM configuration.<br />
- If removed altogether, this selects CAS 0 only, but this should only<br />
be used for testing purposes on a Model B.<br />
26. WEST selects normal video output.<br />
EAST selects inverted video output.<br />
27. WEST selects 8 MHz clock for 5 1/4" disc.<br />
EAST selects 16 MHz clock for 8" disc.<br />
28. WEST selects base baud rate. (1200 baud)<br />
EAST selects 1300 baud cassette rate.<br />
- If link 28 EAST position RS 423 baud rate is also changed by the<br />
same factor:- 13/12.<br />
29. EAST selects base baud rate. (1200 baud)<br />
WEST selects 1300 baud cassette rate.<br />
- If link 28 is in the WEST position, RS 423 baud rates are also<br />
affected.<br />
30o increase the flexibility used for the addition of extra sideways<br />
ROM sockets. This would be in connecton with other links (S20,21,22)<br />
to enable a total of 16 sideways ROMS to be selected.<br />
31. WEST selects +ve CSYNC to RGB video output.<br />
EAST selects -ve CSYNC to RGB video output.<br />
33
32. WEST selects A 13 input to pin 26 of ROMs IC52 and IC88.<br />
EAST selects +5v input to pin 26 of ROMs IC52 and IC88.<br />
- This enables 24 pin ROMs to be used in the 28 pin socket.<br />
33. WEST selects A 13 input to pin 26 of ROMs IC100 and IC101.<br />
EAST selects +5v input to pin 26 of ROMs IC100 and IC101.<br />
- This enables 24 pin ROMs to be used in the 28 pin socket.<br />
34-38. These are used to provide contact with the ROM decoder (IC20)<br />
and the chip select lines of ROMs 52, 88, 100 and 101, in order to<br />
allow the use of extra ROM sockets on an external PCB. (Implemented<br />
from issue 4.)<br />
39. CLOSED adds colour burst signal to the black and white video<br />
signal to produce PAL encoded video on the BNC socket.<br />
OPEN Black and white video on BNC socket. (Implemented from issue 4.)<br />
34
5.2 Table of link options.<br />
The following table gives a list of selection links showing their<br />
positions on the circuit board (mm E,N from SW corner) and on the<br />
circuit diagram (grid reference, see main PCB circuit diagram). The<br />
links made in production on a standard model B without disc or Econet<br />
interfaces are also given.<br />
P = plugable link, T = track, W = wire link, C = closed, 0 = open.<br />
N S E and W refer to orientation of tracks or plugs.<br />
Some links have been omitted on later issue boards, whilst others have<br />
been added.<br />
LINK PCB Circuit Options<br />
position diagram (Model B)<br />
1. 2,1082,5 T N (Not used on issues 2 and 3)<br />
2. 2,16112,7 W C<br />
3. 2,17314,14- - (Not fitted after issue 4)<br />
4. 12, 12 1,9 T E<br />
5. 26,195 14,9 - - (Not fitted after issue 4)<br />
6. 26,205 15,9 - - (Not fitted after issue 4)<br />
7. 30, 65 4,9 T E<br />
8. 32, 15 2,9 T C<br />
9. 35,128 3,10 W C<br />
10. 45, 15 1,8 T W<br />
11. 75,210 13,10 P - (When Econet fitted)<br />
12. 97, 70 9,8 W 0 (Wire link in Model A)<br />
13. 100, 67 9,8 W 0 (Wire link in Model A)<br />
14. 101, 53 7,10 T C<br />
15. 107, 97 7,9 T C<br />
16. 108, 90 7,9 T C<br />
17. 108, 52 7,10 T C<br />
18. 110, 52 7,8 P N<br />
19. 102,102 7,8 P E<br />
20. 123, 55 9,8 P N<br />
21. 122, 65 9,8 P 2 x EW<br />
22. 127, 70 9,8 P N<br />
23. 177,215 13,3 W 0<br />
24. 181,195 13,3 W 0<br />
25. 215,185 7,5 P N<br />
26. 221, 68 10,1 P W<br />
27. 226, 95 1,7 T W<br />
28. 237,144 12,6 T W<br />
29. 237,146 12,6 T E<br />
30. 284, 20 8,8 - - (For external connections)<br />
31. 270,170 14,3 P W<br />
32. 295, 65 9,9 P W<br />
33. 295, 67 10,9 P W<br />
34. 200, 65 9,8 T C (From issue 4 onwards)<br />
35. 245, 20 9,8 T C (From issue 4 onwards)<br />
36. 260, 20 9,8 T C (From issue 4 onwards)<br />
37. 280, 20 9,8 T C (From issue 4 onwards)<br />
38. 300, 15 9,8 T C (From issue 4 onwards)<br />
39. 255,215 9,8 T 0 (From issue 4 onwards)<br />
35
5.3 Circuit Modifications from issue 1 to issue 7.<br />
In this next section are listed the more important changes which have<br />
taken place in the circuit design as it has evolved from issue 1 to<br />
issue 7. Since there are so few issue 1 boards in circulation at the<br />
moment, we will ignore the changes from 1 to 2 and suggest that if you<br />
come across an issue 1 board and cannot solve any fault which occurs on<br />
it, that you should consult the Technical <strong>Service</strong>s Department of Acorn<br />
Computers Ltd.<br />
5.3.1 Changes from issue 2 to 3.<br />
1. The ACK line on PL9, the printer port, was moved from pin 23 to pin<br />
19.<br />
2. A 4k7 resistor (R162) was added to the ACK line to pu11 it up to +5v.<br />
3. Link S1 was removed in order to put in a transistor inverter, Q11.<br />
4. Pin 26 of PL9 was left unconnected to avoid the problem that this<br />
pin is used on some printers as the reset line.<br />
(Changes 1-4 were made retrospectively on most of the issue 1 and 2<br />
circuit boards).<br />
5. Various modifications were made in the region of S9 and IC27 at<br />
various stages, and so for the correct implementation, see section 4 on<br />
the modification for adding the disc interface.<br />
6. A 2k2 pull up resistor (R170) was added to the strobe line of the<br />
printer port (pin 1 of PL9).<br />
7. R109 became select on test (SOT) with a value between 1k8 and 2k7<br />
in order to set the correct colour burst length.<br />
8. C51 also became SOT at a value between 15pF and 22pF in order to set<br />
the colour burst frequency to the correct value of 4.4336 MHz + or -<br />
100 Hz.<br />
9. In order to improve the waveform of the 16MHz signal, C42 was at one<br />
stage a fixed capacitor with a trimming capacitor in parallel.<br />
Therefore various issues of boards will have various different values<br />
for C42. Also the gate used (IC40) was changed from a 74LS00 to a<br />
74S00.<br />
5.3.2 Changes from issue 3 to issue 4.<br />
1. The Econet circuitry was modified in various ways. The clock<br />
generator and terminator components were removed, certain component<br />
values were changed in order to improve circuit performance and the<br />
layout was altered in order to improve the shielding and to reduce<br />
cross-talk.<br />
2. A 22k resistor (R174) was introduced from pin 20 of IC7, the serial<br />
processor, to 0 volts to ensure that if IC74 was absent that the CTSI<br />
line was held low.<br />
3. Having added the 2k2 pu11 up resistor (R170) to printer port strobe<br />
line and put Q11 in its own position, S1 was reinstated.<br />
4. The circuitry associated with S14 to S17, which change the 1MHz bus<br />
to 2MHz, on the issue 3 PCB was incorrect. This should be checked<br />
against the current circuit diagram if it is to be used.<br />
5. The position of D13 was changed to put it in parallel with the relay<br />
coil rather than across the collector and emitter of the transistor (<br />
Q3).<br />
6. The connections from the speech circuit (IC99) to the VIA were<br />
changed. VSPRDY and VSPINT were changed over to connect to PB7 and PB6<br />
respectively.<br />
36
7. A resistor (R171) was connected in series with the EOC line of the<br />
ADC (1C73) in order to prevent momentary output contention which may<br />
occur during power-up.<br />
8. A 4k7 resistor (R173) was connected between pin 7 of IC89 and +5v,<br />
as the output is open collector.<br />
9. Resistors R104, R125, R142, R149, and R153 which were in series with<br />
the ROM chip select lines were replaced by copper links formed on the<br />
component side of the PCB. (S34 to 38)<br />
10. A 10k resistor (R172) was introduced between the analogue input on<br />
the 1MHz bus and 0 volts in order to reduce the input impedance and<br />
hence improve the signal to noise ratio. (See section 6.4)<br />
11. Link S39 was added in order to connect the 470pF capacitor, C58<br />
from the base of Q7 to the emitter of Q9.<br />
12. A 220nF capacitor (C59) was added in series with R90 in order to<br />
AC couple the log amplifier on the cassette interface.<br />
13. A number of changes were made to the Econet control lines in order<br />
to speed up software control. For details of how to bring earlier issue<br />
boards up to the current issue, see the section on upgrading the Econet<br />
system (section 4, modification E).<br />
14. Provision was made for mounting a right-angled phono socket as an<br />
alternative to the free-wired BNC socket normally used for video<br />
output.<br />
15. A 200k potentiometer (VR2) was added in parallel with R32 in order<br />
to adjust the operating frequency of IC99 for the appropriate pitch of<br />
the speech output.<br />
16. At some stage between issues 3 and 4, C34, the cassette output<br />
coupling capacitor was increased from 47nF to 220nF.<br />
5.3.3 Changes from issue 4 to issue 7.<br />
(Issues 5 and 6 never went into production).<br />
1. R114 changed to its present value of 18 ohms 1W, and C42 changed to<br />
33pF.<br />
2. R75 went to its final value of 82k. (The reason for the change in<br />
value of R75 was to control the data carrier detect delay time to avoid<br />
loosing the first bit of the first byte of the first block when<br />
recording data.)<br />
3. The diodes and resistors on the ROM select circuitry which can be<br />
used to produce 1MHz operation were omitted.<br />
4. Links S18 and S19 are made with tinned copper wire.<br />
5. When the video processor ULA was replaced by the first set of<br />
custom-designed ICs, a modification was necessary. S26 was left<br />
unconnected and a wire link was made from the TTX-VDU line (pin 17 of<br />
IC2) to the invert input of the videoprocessor (pin 27 of IC6). Later<br />
versions of the custom IC made this modification unnecessary.<br />
A11 other changes from issue 4 to issue 7 were cosmetic changes<br />
including some thickening up of the tracks to improve the power supply<br />
distribution.<br />
37
6 Servicing and Fault-finding<br />
6.1 Introduction<br />
Before starting, it should be realised that attempt at repair by any<br />
person other than a registered dealer or service agent will void the<br />
warranty.<br />
6.2 Test Equipment<br />
The very minimum test equipment required in order to trace even the<br />
simplest fault is a digital multi-meter and an oscilloscope (or<br />
possibly a logic probe). It is difficult in a book such as this to do<br />
more than give a few general guide-lines as to the sort of problems to<br />
look for, and a few techniques which might be used.<br />
Acorn Computers Ltd supply two pieces of test equipment which are<br />
specifically designed for the <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> which are known as the<br />
PET (Progessive Establishment Tester) and the FIT (Final Inspection<br />
Tester). Whilst the service agent or dealer might be expected to have<br />
these pieces of equipment, the average user is unlikely to feel that it<br />
is worth purchasing them for the limited amount of fault-finding he or<br />
she would be likely to do. The purpose of the PET, which is the more<br />
expensive of the two items, is to take an apparently lifeless computer<br />
and attempt to find out where the fault lies. The FIT on the other hand<br />
is somewhat simpler and its aim is not to isolate a known fault but to<br />
check whether an apparently working computer is in fact working in all<br />
respects. Both the PET and the FIT are the subject of entirely separate<br />
documents produced by Acorn Computers PLC.<br />
Two other very useful pieces of "test equipment" are a can of freezer<br />
spray and a hair-dryer! It is fairly common for faults in some of the<br />
ICs to be associated with temperature conditions. Therefore if you have<br />
reason to suspect a particular component, it is sometimes helpful to "<br />
exercise" the device by the use of these two items. This can sometimes<br />
show up a fault quite clearly. However, this can be slightly misleading<br />
in cases where the fault is caused by a timing problem on some device.<br />
This is because changing the temperature conditions of one device which<br />
may not itself be at fault, may, by changing the relative timing, bring<br />
the timing back into a working condition. Therefore having discovered a<br />
device which apparently has a temperature fault, before de-soldering<br />
it, it is well worth temperature cycling the associated components.<br />
38
6.3 Fault Isolation<br />
Having checked that the apparent fault is not a problem with the<br />
program, the first thing, to do is to isolate the problem to a<br />
particular area of the computer. For example, if the problem is in<br />
loading and saving programs with a cassette recorder then attention<br />
should be focussed on the cassette interface itself. However, this is<br />
not as easy as it sounds in some cases because of the links between<br />
various sections of the circuit. It would probably be worthwhile<br />
reading through most of the circuit description given in this book, in<br />
order to try to gain an understanding of the operation of the computer<br />
as a whole before trying to deal with one apparently isolated section<br />
of the computer's hardware.<br />
The simplest fault to check for is malfunctioning of the power supply.<br />
Voltages can be measured at the terminals on the PCB where the power<br />
leads are attached, but it is worth checking, particularly with the<br />
older linear type power supplies, that the +5 volts is available on<br />
each of the three pairs of connectors. It is also worth checking that<br />
the -5 volts is present because although the processor, memory and VDU<br />
will all function normally if the -5 volts is not present, it is<br />
essential for cassette, sound, speech and RS423 interfaces.<br />
If the power supply is NOT working then you should NOT attempt to<br />
repair it. The reason is that in order to maintain the safety<br />
specification to which the computer was designed, any repair to the<br />
power supply, including replacement of power supply cable, must be<br />
checked for earth continuity at a current of not less than 10 A, and<br />
must undergo a Dielectric Withstand Test between both live and neutral<br />
to ground of 1500 V AC. This requires specialist equipment and training<br />
and should not even be attempted by dealers, unless they have the<br />
necessary equipment and expertise.<br />
The worst kind of fault with a microprocessor system is that the<br />
processor is unable to fetch instructions from the ROM, process them<br />
and then produce some sort of result which the operator can see or<br />
hear. In the case of such faults, the whole system appears completely<br />
dead and it is very difficult to locate the specific fault. This kind<br />
of problem is made worse on this particular computer because of the<br />
technique used to refresh the dynamic RAM. Not only must the processor<br />
fetch instructions from ROM and process them, but also it must<br />
successfu11y program the CRT controller which, in turn, must begin to<br />
produce refresh addresses for the dynamic RAM before the system memory<br />
can operate.<br />
Assuming then that the machine appears totally dead even though the<br />
power supply unit is apparently working, and that you do not have<br />
access to a PET, then here are a number of things you could check:-<br />
i) Check that the reset line on the 6502A (pin 40) is high, and only<br />
goes low when BREAK is pressed.<br />
ii) Check that the IRQ line is not permanently in either a low or high<br />
state. (Pin 4 of the 6502A)<br />
39
iii) Check for the presence of the various clock signals, for example,<br />
the clock input and output on the 6502A (pins 37 and 3), and the 1, 2,<br />
4 and 8 MHz signals on pins 4, 5, 6 and 7 of the video processor (IC6).<br />
iv) A very useful pin to check is pin 7 on the 6502A. This is the sync<br />
pin and, although it is not actually used in the circuit, it gives an<br />
indication of whether or not the 6502A is fetching any instructions. If<br />
this is permanently high or low then the 6502A is totally stalled.<br />
v) Check that the read-write line (pin 34) of the 6502A is working<br />
normally and also check that the same signal, having been inverted and<br />
re-inverted, is available at pin 10 of IC33.<br />
vi) Check for the horizontal and vertical sync signals coming from the<br />
CRTC (pins 39 and 40 of IC2) which will reveal whether or not the CRTC<br />
has been successfu11y programmed at system reset.<br />
If you do detect something abnormal in one of these tests then the next<br />
stage would be to remove from the board any devices in IC sockets which<br />
are unnecessary to the basic operation of the computer. For example,<br />
the 6850 ACIA (IC4), the serial processor (IC7), the ADC Converter (<br />
IC73) and the external 6522 (IC69). Having removed these devices, if<br />
the fault disappears, then it may simply be a case of replacing them<br />
one by one until the fault reappears. If the fault remains, then if you<br />
have any spare ICs, or another machine with which you could exchange<br />
ICs, it would be worth replacing the internal VIA (IC3), the 6502A (<br />
IC1), the 6845 (IC2) and the video processor (IC5).<br />
At this stage the next thing to try is to examine each of the<br />
individual address and data lines to see if one or more of these lines<br />
is permanently high or low. If so, look for short circuits, solder<br />
bridges etc on that line. It is worth checking these lines both on the<br />
6502A itself and also IC51, the operating system ROM.<br />
When looking around the board at various points with an oscilloscope,<br />
try to find any waveforms which either have "slack" edges, ie sloping<br />
rather than square, or which have voltage levels which are not within<br />
the normal TTL range. (Logic 1 must be greater than 2.8V and logic 0<br />
less than 0.8V, though normally one would not expect to see voltages of<br />
less than about 3.4V or more than 0.4V.)<br />
Another very useful test with a model B, is to move link S25 to the<br />
south position to see if the computer will operate in the 16K mode, in<br />
which case, it suggests a problem with the CAS 0 area of RAM. Then if<br />
you remove S25 altogether, it puts the machine again into the 16K mode<br />
but this time with the CAS 0 area enabled and the CAS 1 area<br />
inoperative.<br />
40
6.4 Most Common Faults<br />
In the following section, we shall try to give some ideas which have<br />
been colllected from various people who have been doing a good deal of<br />
servicing and repair work on <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong>s. There will be no<br />
particular order to the comments but reading through all of them should<br />
give some useful ideas about faults which are likely to occur.<br />
* A common reason for getting sound-on-vision effects is that the<br />
power leads have become intermittent. To check whether they are giving<br />
a problem, a quick flick with one finger is what the experts recommend.<br />
If this causes the display to flicker then switch off the unit, remove<br />
the power leads, pull back the insulating sleeves, solder along the<br />
area where the wire is crimped by the terminal, and replace them, being<br />
careful not to exchange the 0 and +5 volt connectors.<br />
* It is possible for the ROM sockets to develop bad contacts. This is<br />
sometimes caused by heavy-handed use of the "butterfly" carrier boards<br />
which were used at various stages to put two 8K eproms into one single<br />
16K socket. The only solution for this is to replace the ROM socket<br />
entirely, and you would be well advised to use the best quality socket<br />
available. This is not an easy task unless you are experienced in the<br />
use of desoldering equipment.<br />
* The most common reason for the cassette system becoming inoperative<br />
is a damaged LM324. Another problem is with the clock input to the<br />
serial processor and it is worth checking that this is the correct<br />
frequency (ie 1.23 MHz = 812 ns periodic time). Another problem which<br />
sometimes occurs is that the value of R75 needs to be changed. The<br />
optimum value is different for different issues of the serial processor<br />
ULA because of the variation in impedence of pin 15 to earth. This<br />
affects the timing between receiving a high tone lead-in and asserting<br />
the data-carrier detect on the ACIA. For ICs numbered 2C199E and<br />
2C199E-3, R75 should be 100x or 56k as required for consistent loading<br />
of data. For 2C199E-7, R75 should be 82k.<br />
* One simple problem, but unfortunately fairly common, is that the<br />
pins of ICs tend to get bent as they are pushed into the sockets. If<br />
you have isolated the fault to a particular area, then this is something<br />
to look out for. It is also not unknown for the IC socket itself to<br />
have a pin bent underneath. This may not have been noticed by quality<br />
control if the IC socket was empty at the time of production eg speech<br />
IC socket.<br />
* If you wish to get two <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong>s to send programs to each<br />
other on the cassette system, then it is possible to do so by a direct<br />
connection, provided a 1.5k resistor is connected between the signal<br />
line and ground. With the later issue boards, that have the 220nF<br />
output capacitor on the cassette system, a smaller value may be<br />
necessary. The resistor is necessary to adjust the relative phase of<br />
the two tones of the cassette signal.<br />
41
* On a number of occasions, the tracks on the right hand side of the<br />
keyboard PCB have become broken in transit. This occurred more<br />
frequently on earlier versions and less so since the newly modified<br />
case has been used, but if any of the keys on the right hand side are<br />
inoperative then this is a likely cause. Excessively hard use of the<br />
keyboard may also cause solder pads to lift. A group of nonfunctional<br />
keys would indicate that this has happened. This could be<br />
checked quite simply by the use of a meter to test continuity.<br />
* A number of people complain of interference on the sound signal.<br />
This is caused by the pick up of digital noise as the track goes from<br />
the 1MHz extension bus input to the audio stages. The solution is to<br />
connect a 10k resistor across from this line to ground. This should<br />
only be necessary on issues 1 to 3 of the PCB. It can be done by<br />
connecting the resistor between pin 8 of IC20, which is ground, to the<br />
plated-through hole just to the south of that pin. It is necessary to<br />
scratch away the solder resist very carefully from around this hole,<br />
before you can successfully solder into it.<br />
* One simple problem that sometimes occurs is that of getting<br />
twinkling characters in some of the higher modes of graphics, or<br />
smeering of the cursor. If this was not originally a problem but has<br />
developed after some months of use, then it may well be that the heat<br />
sink on the video processor has become dislodged. This can be put right<br />
by applying firm pressure to the heat sink and also possibly by<br />
applying more heatsink compound between it and the top of the<br />
integrated circuit.<br />
42
* Certain other faults on the VDU display associated' with the UHF<br />
output can be cured by adding extra decoupling to the supply to the<br />
modulator to improve its stability. A 10 ohm series resistor with a 4.7<br />
uF capacitor to earth is usually sufficient.<br />
* It has been noticed that problems can occur with some of the 74LS74<br />
ICs, especially from certain manufacturers. If there is any problem<br />
therefore with the cleaness of the clock pulses applied to the 6502A,<br />
or problems with the PAL encoder circuit, or more likely with the RAS<br />
signal, it would be worth checking the output of these ICs to see if<br />
they are driving to the full TTL levels.<br />
* Unfortunately, a number of problems also arise when people have<br />
tried to do their own upgrades and have made mistakes or used bad<br />
soldering techniques. In particular, a number of people seem to get the<br />
printer upgrade on the issue 2 board wrong and therefore this should be<br />
checked very carefully (see section 4). Also it is worth checking the<br />
soldering very carefully, particularly around the area of the IDC<br />
connectors. This is because it is easy to get solder bridges over the<br />
tracks which are fed in between the pins on this connector. The worst<br />
place seems to be in the area of the tube connector.<br />
* If there are problems associated with the PAL or cassette circuitry,<br />
it is worth checking very carefully whether the correct resistor values<br />
have been used. Since there are so many resistors so closely packed<br />
together, it is very easy to get resistors in the wrong places. To<br />
check this, it is best to remove the circuit board from the case<br />
entirely and use a strong light source in order to view the resistor's<br />
colour codes carefully. This is well worth doing, as it can save a lot<br />
of time looking for faults which are basically simple but which would<br />
be difficult to diagnose.<br />
* Our service centres tell us that there is a series of rather obscure<br />
faults which they have detected which is associated with timing<br />
problems with the RAM. One symptom is twinkling characters in mode 7<br />
but not in the other modes of graphics, and another is that when<br />
playing Acornsoft's "Defender" (not the later version of "Planetoids")<br />
some very strange effects occur as the game continues. Also there is a<br />
program of 3D Noughts and Crosses from Beebug which produces a strange<br />
fault, stopping inexplicably at one particular line and giving a No<br />
Room error. These faults, being related to relative timing, can<br />
sometimes be cured by changing the 6502 processor, or the 74LS245 (<br />
IC14) and are more often noticed where the RAM in CAS 1 is a different<br />
type from the RAM in CAS 0, when an A to B upgrade has been done. In<br />
particular it seems to be that the Fujitsu RAMs do not mix well with<br />
the Mostek or Hitachi RAMs.<br />
43
6.5 Test programs and sample waveforms<br />
6.5.1 Test program<br />
The following program allows you to test the chip select lines of any<br />
of the devices on the computer. It sets up a machine code loop which<br />
accesses the address which you specify as hexadecimal number. Since it<br />
is a closed loop, the only way to escape is to use the break key which<br />
is programmed to re-enter the BASIC program. To escape, enter a zero<br />
address. If you are accessing a slow device, its chip select line<br />
should go low for a full microsecond, but with a fast device, it will<br />
only be low for 500 nanoseconds. In either case, the waveform should be<br />
high for 3 microseconds.<br />
10 *KEY10 OLD|M RUN|M<br />
20 CLS<br />
30 DIM' CODE 20<br />
40 P%=CODE<br />
50 INPUT "ADDRESS",M$<br />
60 M%=EVAL("&" + M$)<br />
70 IF M%=0 THEN END<br />
80 [SEI<br />
90 SEC<br />
100 .again<br />
110 LDA M%<br />
120 BCS again<br />
130 ]<br />
140 CALL CODE<br />
The following is a reproduction of a photograph showing the waveform on<br />
pin 23 of the ADC chip, IC73, when the above test program is running<br />
with address &FECO selected. Scope parameters are 1V/cm, 1us/cm.<br />
44
The following shows pin 24 of the disc controller chip, 1C78,<br />
selected by using address &FE80. Scope parameters are 1V/cm, 1us/cm.<br />
The following shows two traces while the test program is running: top<br />
trace is 2MHz clock pin 37 IC1, and bottom trace is CAS0 pin 7 1C45.<br />
Scope parameters are 2V/cm, 100ns/cm.<br />
45
The 'following shows two more traces while the test program is running:<br />
top trace is 2MHz pin 37 IC1, and bottom trace is CAS1 pin 5 IC45.<br />
Scope parameters are 2V/cm, 100ns/cm.<br />
The following shows two more traces while the test program is running:<br />
top trace is 2MHz pin 37 IC1, and bottom trace is RAS pin 12 IC43.<br />
Scope parameters are 2V/cm, 100ns/cm.<br />
46
6.5.2 Test ROM<br />
The listing shown below is the object code for a ROM which could prove<br />
extremely useful for fault-finding an apparently dead machine,<br />
especially if you do not have a PET. There are three routines given,<br />
but you could extend the idea for up to 8 different routines if you<br />
wanted to do so. The idea is that a 2764 ROM is put in place of the<br />
operating system ROM and the routine which the system starts on powerup<br />
or break is determined by taking the address lines that would<br />
normally be connected to A10, All and Al2 (pins 21, 23 and 2 of the<br />
2764 respectively) and have some means of attaching them to +5 volts or<br />
0 volts.<br />
This can be done crudely by bending up the three pins so that they don'<br />
t engage in the IC socket, and soldering on to them three leads<br />
terminating in crocodile clips. These can then be used to select the<br />
address by clipping on to the +5V and OV rails, being careful not to<br />
let them short out. For a system that is to be used regularly for<br />
fault-finding, it is wise to use either a DIL switch or better still a<br />
thumbwheel switch, properly mounted.<br />
The three routines given are:-<br />
Routine "0": Provides a chip select pulse for each memory-mapped device<br />
around the board in turn. The pin numbers at which each pulse should<br />
appear are given in the program.<br />
Routine "1": This sets up the teletext mode of graphics by programming<br />
the 6845 and the video processor appropriately. Then codes 0 to 255 are<br />
stored in the first four pages of video RAM. If there is a RAM fault<br />
then the display will not be the succession of ASCII character which<br />
you would expect, and by careful thought about which characters are in<br />
error, you should be able to diagnose where the problem lies. The<br />
pattern is periodically re-written so that intermittent faults will<br />
show up and you can try temperature exercising any suspect chips.<br />
Routine "2": This is similar to the previous routine but by<br />
incrementing a location on the screen it checks the combination of<br />
reading and writing; ie if the RAM can be written to but not read then<br />
the character at location &7C01 will not cycle through 0 to 255 since<br />
the read instruction will be in error. All these routines are working<br />
in machine code at high speed and therefore it is easy to use an<br />
oscilloscope to probe around the circuit to see what has gone wrong.<br />
10 FOR N% = 0 TO 2 : REM ie 3 tests available<br />
20 PROCtest(N%)<br />
30 NEXT<br />
40 *SAVE ROMIMAG 3000 + 2000<br />
50 END<br />
60<br />
70 DEFPROCtest(N%)<br />
80 offset% = &400*N%<br />
90 0% = &3000 + offset%<br />
100 P% = &F800<br />
110 table% = P% + &200<br />
120 !(&33FC + offset%) = &F800 : REM RESET vector<br />
130 opt% = 5<br />
140 IF N% = 0 PROC strobe select lines<br />
150 IF N% = 1 PROC DRAM test<br />
160 IF N% = 2 PROC RNW exercise<br />
47
170 !(&3200 + offset%) = &4433283F<br />
180 !(&3204 + offset%) = &1B19021E<br />
190 !(&3208 + offset%) = &13721293<br />
200 !(&320C + offset%) = &002C002C<br />
210 ENDPROC<br />
220<br />
230 DEFPROC strobe select lines<br />
240 [OPT opt%<br />
250<br />
260 .loop<br />
270 LDA &FE00 \ IC2 pin 25 (CRTC)<br />
280 LDA &FE08 \ IC4 pin 9 (ACIA)<br />
290 LDA &FE10 \ IC7 pin 9 (SER PROC)<br />
300 LDA &FE18 \ IC96 pin 1 (STATID) or IC97 pin 4 (INTOFF)<br />
310 LDA &FE20 \ IC97 pin 2 (INTON)<br />
320 STA &FE20 \ IC6 pin 3 (VID PROC)<br />
330 STA &FE30 \ IC76 pin 9 -(ROMSEL)<br />
340 LDA &FE40 \ IC3 pin 23 (VIA A)<br />
350 LDA &FE60 \ IC69 pin 23 (VIA B)<br />
360 LDA &FE80 \ IC78 pin 24 (FDC)<br />
370 LDA &FEAO \ IC89 pin 9 (ADLC)<br />
380 LDA &FECO \ IC73 pin 23 (ADC)<br />
390 LDA &FEE0 \ PL 12 pin 8 (TUBE)<br />
400 LDA &FC00 \ PL 11 pin 10 (FRED)<br />
410 LDA &FD00 \ PL 11 pin 12 (JIM)<br />
420 JMP loop<br />
430 ]<br />
440 ENDPROC<br />
450<br />
460 DEFPROC DRAM test<br />
470 [OPTopt%<br />
480 LDX £&OF<br />
490 STX &FE20 \ Write to Vidproc<br />
500<br />
510 .setup_6845<br />
520 LDA table%,X \ table of 6845 data<br />
530 STX &FE00 \ Register number<br />
540 STA &FE01 \ Contents of register<br />
550 DEX<br />
560 BPL setup_6845<br />
570 LDA £3<br />
580 STA &FEFE \ send down TUBE<br />
590<br />
600 .restart<br />
610 LDY £0<br />
620<br />
630 .loop2<br />
640 NOP<br />
650 TYA<br />
660 STA &7C00,Y<br />
670 STA &7D00,Y<br />
680 STA &7E00,Y<br />
690 STA &7F00,Y<br />
700 INY<br />
710 BNE loop2<br />
720<br />
730 LDA £&42<br />
740 STA &FE20 \ Write to Vidproc<br />
750 JMP restart<br />
760 ]<br />
48
770 ENDPROC<br />
780<br />
790 DEFPROC_RNW_exercise<br />
800<br />
810 [OPT opt%<br />
820 LDX £&0F<br />
830 STX &FE20 \ Write to Vidproc<br />
840<br />
850 .setup 6845<br />
860 LDA table%,X \ table of 6845 data<br />
870 STX &FE00 \ Register number<br />
880 STA &FE01 \ Contents of register<br />
890 DEX<br />
900 BPL setup_6845<br />
910<br />
920 LDA £3<br />
930 STA &FEFE \ send down TUBE<br />
940<br />
950 LDA £&41 \ Character "A"<br />
960 LDY £0<br />
970<br />
980 .write<br />
990 INC &7C01 \ Change character on screen<br />
1000 STA &7D00,Y<br />
1010 STA &7E00,Y<br />
1020 STA &7F00,Y<br />
1030 INY<br />
1040 BNE write<br />
1050<br />
1060 LDA £&42 \ Character "B"<br />
1070 STA &FE20 \ Write to Vidproc<br />
1080 JMP write<br />
1090 ]<br />
1100 ENDPROC<br />
The following is a reproduction of a photograph showing the waveform on<br />
pin 34 of the 6502 (R/W of IC1). Scope parameters are 1V/cm, 2us/cm.<br />
49
7 Interfacing Survey<br />
7.1 Purpose of each interface<br />
Since there are so many different interface connections on the <strong>BBC</strong><br />
microcomputer, it may be a help to look at each in turn and talk about<br />
possible applications for each. Working from left to right on the back<br />
of the computer, we start with the UHF output, which provides a PAL<br />
colour TV signal for use with a normal colour television. Next is a<br />
video output on a BNC connector which is intended to be used with a<br />
black and white video monitor. However it is possible to introduce the<br />
colour burst information onto this signal in order to produce a PAL<br />
composite video signal. On circuit boards issue 4 onwards, it is<br />
possible to introduce this signal by adding a simple link, S39. On<br />
previous issue boards it is necessary to introduce a 470pF capacitor<br />
from the emitter of Q9 to the base of Q7. This capacitor would have to<br />
be soldered directly on to the circuit board.<br />
The third connector which is provided for video output is a 6-way, 240<br />
degree DIN plug. This provides the red, green, blue and sync signals<br />
needed for an RGB monitor. The sync signal is a 5 volts, negative going<br />
pulse of 4.7uS duration, but it can be changed to positive going by<br />
changing link S31. Also provided on this connector are a 0 volt and a<br />
+5 volt supply, but these should not be used for providing more than a<br />
few milliamps to external circuits.<br />
The next connector is a serial port of the RS423 standard. This is a<br />
standard which has superior drive capabilities to the RS232 interface<br />
and is run in this case between +5 volt and -5 volt levels. The speed<br />
is software selectable at 75, 150, 300, 1200, 2400, 4800 or 9600 baud.<br />
There is a higher speed of 19200 baud, but this is not guaranteed to be<br />
error-free. It is also possible to get the interface to work at 110<br />
baud, but this requires a modification which would also change the<br />
speed of the cassette interface. (See section 7.3 on hardware hints and<br />
tips for more information.) The control signals provided are the normal<br />
CTS and RTS lines, the RTS output also working on +5 volt and -5 volt.<br />
NB When making up a connector for the RS423, note that connections as<br />
shown on the circuit diagram refer to the socket. For the plug<br />
connections, refer to page 504 of the User Guide which gives the<br />
connections as seen from outside the case.<br />
Apart from using the RS423 interface to run a serial printer it is also<br />
possible to use it to communicate with other computers. For example, it<br />
is possible to communicate with a mainframe computer either directly<br />
within a building on a wired link or, by using the telephone network,<br />
to a computer in another building or even another country. This would<br />
of course require the use of an acoustic coupler.<br />
There are various levels at which this link could be used. Firstly the<br />
computer could be used as a "dumb terminal" which would simply be<br />
capable of sending characters typed on the keyboard to the mainframe<br />
computer and receiving characters from the mainframe and printing them<br />
on the screen. The following program will allow you to do so.<br />
50
10 REM Dumb Terminal Program<br />
20 REM Only works on OS 1.0 & following<br />
30 REM Works even if Tube fitted.'<br />
40 REM<br />
50 OSASCI = &FFE3<br />
60 OSBYTE = &FFF4<br />
70 OSWRCH = &FFEE<br />
80 CLS<br />
110 DIM CODE 50<br />
120 FOR J=0 TO 2 STEP2<br />
130 P%=CODE<br />
140 [OPT J<br />
150 .RS423<br />
160 LDA £&91<br />
170 LDX £1<br />
180 JSR OSBYTE\character in RS423 buffer?<br />
190 BCS keyboard<br />
200 TYA<br />
220 JSR OSWRCH\or OSASCI for CRLF<br />
230 .keyboard<br />
240 LDA £&91<br />
250 LDX £0<br />
260 JSR OSBYTE\character in keyboard buffer?<br />
270 BCS RS423<br />
280 TYA<br />
290 JSR OSWRCH\or OSASCI for CRLF<br />
300 LDA £&8A<br />
310 LDX £2<br />
320 JSR OSBYTE\Put character in RS423 output buffer<br />
330 JMP RS423<br />
340 ]<br />
350 NEXT<br />
360 *FX 7,7<br />
370 *FX 8,7<br />
380 *FX 2,2<br />
390 CLS<br />
400 CALL CODE<br />
The next level would be its use as a semi-intelligent terminal which<br />
would enable you to use some of the processing of the <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong><br />
to deal with file handling, so. that the text could be prepared off<br />
line, stored on disc and then spooled down to the mainframe when the<br />
link is made. The third level then would be to use the graphics<br />
facilities of the <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong> in addition to its ability to print<br />
text. This produces the possibility of using the computer as a colourgraphics<br />
terminal to a mainframe computer at a fraction of the cost.<br />
All that is needed is for someone to write the appropriate terminal<br />
emulation software and put it in sideways ROM. There are now a number<br />
of such packages commercially available.<br />
51
The other way in which the RS423 can be used is to link two <strong>BBC</strong><br />
computers together. One reason for doing this would be to enable<br />
software to be downloaded from a disc system to another computer which<br />
does not have a disc interface. A 15K program can be downloaded using<br />
an RS423 link in approximately 20 seconds which is clearly faster than<br />
using a cassette to cassette link. The only software involved in doing<br />
this is to type in, on the receiving computer:<br />
NEW <br />
*FX2,1 <br />
(This sets the RS423 as input instead of the keyboard.)<br />
and then on the sending computer you would type in:<br />
*FX3,7 <br />
LIST <br />
*FX3,0 <br />
(This enables the RS423 as the output and sends a listing of the<br />
program so that, to the receiving computer,, it is as if it were being<br />
typed in from the keyboard.)<br />
If you have a number of transfers to do, then these commands could be<br />
programmed onto a single key on each machine. When the program has been<br />
sent down, you simply have to press BREAK on the receiving computer,<br />
type OLD and then the program is ready for use. If you are<br />
doing a <strong>BBC</strong> to <strong>BBC</strong> link over a short distance and want to use the full<br />
speed of the interface then you will have to connect the hand-shake<br />
lines as well as the data lines. The "data out" from one computer<br />
should be connected to the "data in" of the other computer and viceversa,<br />
and in a similar way for the control lines, the RTS on one<br />
should be connected to the CTS on the other and vice-versa. If you are<br />
working over a longer distance and want to use only three cables, data<br />
in, data out, and ground and are prepared to work at a slower speed<br />
without any handshaking, then you have to loop back the RTS to the CTS<br />
on each of the computers so that each is permanently enabled for<br />
sending. If you do not do so, the RS423 output buffer fills up and<br />
printing stops after a number of characters have been sent to the<br />
screen.<br />
If you want to use the RS423 interface over a long distance at high<br />
speed using the hand shake lines, it might be necessary to terminate<br />
the receivers by making links S23 and S24. This terminates the line<br />
with its characteristic impedance of 180 ohms.<br />
The cassette interface is a standard CUTS cassette interface. It has<br />
two speeds, 300 and 1200 baud, controllable by software. There is also<br />
motor control provided on pins 6 and 7 of the 7-way DIN plug. The<br />
rating of the relay contacts is 24V at 1A DC, and they should not,<br />
under any circumstances, be used to switch mains voltages, no matter<br />
how small the current. If you wish to get two <strong>BBC</strong> <strong><strong>Micro</strong>computer</strong>s to<br />
send programs to each other on the cassette system, then it is possible<br />
to do so by a direct connection, provided a 1.5k resistor is connected<br />
between the signal line and ground.<br />
52
The analogue input is on a 15-way D-type connector and provides four<br />
A to D converter channels and two digital input lines which work on the<br />
internal 6522 VIA. The pin connections are arranged so that the signals<br />
are divided into two sets intended for use with two games paddles, each<br />
of which will have two A to D inputs and a voltage reference source as<br />
well as the ground and one of the digital input lines.<br />
The conversion time for each channel is 10 milliseconds, but you can<br />
choose to have as few or as many of the channels working as you wish by<br />
using the *FX16 command. Therefore if all four converters are required,<br />
you need to allow 40 milliseconds to be sure of a successful conversion<br />
on any one channel. However ADVAL(0) in BASIC, or OSBYTE call 128 in<br />
machine code, can be used to see which channel has just converted, and<br />
OSBYTE call 17 allows you to force a particular ADC channel to convert,<br />
out of turn. The resolution is software selectable between 8 and 12<br />
bits resolution using OSBYTE 190. However in the 12 bit resolution<br />
mode, the true resolution is somewhat less than 12 bits. It is probably<br />
more realistic to think in terms of a 9 or 10 bit accuracy.<br />
Also provided on this connector is an input to the light pen strobe on<br />
the 6845 CRT controller. The hardware involved in setting up a light<br />
pen system is quite simple. The light pen circuit has to produce a<br />
positive-going 5 volt pulse with a duration of greater than 100 ns.<br />
However the software involved is quite complicated if you want to do<br />
more than identify character blocks. This is because of the way in<br />
which the 6845 has been extended beyond its normal memory range in<br />
order to provide bit-mapped graphics.<br />
The final connector which is provided on the back of the computer is<br />
only available when the unit has been upgraded with an Econet<br />
interface. This is a standard 5 pin 180 degree DIN plug to provide the<br />
necessary data and clock signals for the Econet interface.<br />
Underneath the computer is a set of standard IDC connectors. First of<br />
all there is a 34 way connector for the disc drive(s). This connector<br />
carries the standard connections for a 5.25" disc drive. The next two<br />
are a 26-way and a 20-way IDC connector which are used to provide<br />
connections to the two ports of the external 6522 VIA. The 26-way<br />
connector links to port A, and is arranged in a standard format for use<br />
with a Centronics-type parallel printer. The 8 port lines are buffered<br />
to provide better drive capabilities, but it does mean that they can<br />
only be used for output. If you want to use these lines to drive some<br />
other device, you should work on the basis of each line being able to<br />
sink 10 mA at logic 0 or to source 400 uA at logic 1. Of the two<br />
control lines, CA1 is available as an input with a single 4k7 pull up<br />
resistor on it, whilst the CA2 line is available as an output, the line<br />
being buffered by a single transistor (Q11) to improve the current<br />
sinking. On boards from issue 4 onwards, there is a selection link (S1)<br />
which will enable this line to provide direct connection to CA2 so that<br />
it can be used as either input or output.<br />
53
The 20-way User Port is much simpler in that all connections go<br />
directly to the lines on the VIA (PBO to PB7 and also control lines CB1<br />
and CB2). If you are using these lines for output you should consult<br />
the 6522 data sheet to establish the amount of drive current available.<br />
The next connector, another 34-way IDC, provides an extremely versatile<br />
interface known as the 1MHz extension bus. This interface is the<br />
subject of a separate Application Note and at this stage it is<br />
sufficient to say that it provides two "pages" (2 x 256 bytes) of<br />
memory locations mapped between &FC00 to &FDFF. By using one of these<br />
locations (&FCFF) as a paging register it is possible to extend the<br />
memory addressing capability to a full 64K bytes.<br />
The final connector is a 40-way IDC which provides an interface known<br />
as the "Tube", intended for use with a second processor. Although the<br />
hardware on the <strong>BBC</strong> microcomputer side is very simple, the hardware on<br />
the second processor is extremely complex and it really requires a ULA<br />
to incorporate all the hardware necessary to handle the protocol. It is<br />
therefore suggested that any interfacing to the Tube should be done<br />
only using products from Acorn Computers Ltd.<br />
7.2 Interfacing to various printers.<br />
It is possible to interface to a wide variety of printers using the two<br />
interfaces provided. First of all, for serial printers, the RS423<br />
connector can be used and secondly, for parallel printers the<br />
Centronics interface can be used. It is also possible to link up to<br />
various other non-standard printers such as the IEEE 488 printers used<br />
for the Commodore Pet computers. This is more difficult and requires<br />
connection not only to the Printer Port, but also the User Port to<br />
provide extra control lines and also requires extra software within the<br />
machine.<br />
It is possible to write your own printer driver routine which works<br />
through the operating system.<br />
In order to link up to teletype printers, which run at 110 baud, you<br />
have to change the position of link S28. This is explained in detail in<br />
section 7.3.<br />
One important point to note is that on issue 1 printed circuit boards,<br />
the pin connections on the printer port are not quite the same as later<br />
issues. Pin 19 is the ACK line and pin 26 is not open circuit as it<br />
should be for certain printers. If you wish to use this interface, for<br />
example with the Seikosha GP80A, you will encounter problems since pin<br />
26 is used as a reset line. Another problem which may occur on the<br />
early issue boards is that there is no pull-up resistor on the CA2 line<br />
thus leaving the collector of transistor Q11 open circuit.<br />
54
7.3 Hardware Hints and Tips<br />
Here are a number of miscellaneous hints and tips which have come from<br />
various sources.<br />
* RS423 at 110 baud<br />
In order to get the RS423 interface to work at 110 baud, all that has<br />
to be done is to use the *FX8,1 command in order to set 75 baud and<br />
then change the position of link S28. This link is made by a track on<br />
the PCB, between the centre pin and the west pin. This link has to be<br />
broken and a solder link made from the centre pin to the east pin. This<br />
has the effect of speeding up all of the baud rates, both send and<br />
receive by 44%, and also makes the cassette port run fast by the same<br />
amount, so a single pole double throw switch could be wired to S28 in<br />
order to select the normal speed or the fast speed for the 110 baud.<br />
The actual speed produced is 108.333 but this is near enough for most<br />
teletype printers.<br />
* Disabling Break<br />
For certain applications, particularly when the computer is being used<br />
by very young children, it is most frustrating when the user presses<br />
the break key. It is easy enough to disable the escape key within a<br />
program, but the break key is mare of a problem. You could use *KEY10<br />
OLD|M RUN|M but even this is not very satisfactory. The alternative is<br />
to disable the break key electrically, which can be done by removing a<br />
link from the keyboard PCB. You could then wire it up to a miniature<br />
ON-OFF toggle switch which can be mounted on the back of the case by<br />
drilling a suitable hole, or leave it open circuit and use the contacts<br />
at the back of the main PCB marked "RST SW", to provide an alternative<br />
break key. The disadvantage of doing this though is that if you are<br />
using a disc system, you may want to be able to do a SHIFT break in<br />
order to boot the disc. The position of the link to be removed is shown<br />
below.<br />
55
8 Component location tables<br />
The following lists of components should enable you to locate any<br />
component on the main circuit diagram by its X and Y grid reference (<br />
see grid numbers on main PCB circuit diagram). For ICs and selection<br />
links, their positions on the PCB itself are also given. These are<br />
defined by X and Y coordinates in millimetres, measuring from the SW<br />
corner of the PCB.<br />
8.1 Integrated circuits<br />
NB Some ICs which contain more than one circuit will appear at more<br />
than one place on the circuit diagram.<br />
IC Type PCB Circuit Comments<br />
Position Diagram<br />
1 6502A 160,85 10,6<br />
2 6845 160,140 5,3 CRT controller<br />
3 6522 90,75 5,9 Internal VIA<br />
4 6850 128,141 11,5 ACIA<br />
5 SAA5050 187,102 10,2 Teletext ROM<br />
6 5C094 214,71 7,6 10,1 Video ULA<br />
7 2C199 128,182 12,4 Serial ULA<br />
8 81LS95 241,62 5,1<br />
9 81LS95 241,93 5,2<br />
10 81LS95 252,63 5,3<br />
11 81LS95 252,93 5,4<br />
12 81LS95 275,62 5,4<br />
13 81LS95 264,62 5,5<br />
14 74LS245 184,71 9,4<br />
15 74LS273 196,71 9,2<br />
16 LM555 7,210 6,7<br />
17 LM324 6,28 4,6<br />
18 76489 .22,44 5,6 Sound generator<br />
19 LM386 52,23 5,5<br />
20 74LS139 120,23 7,10 9,8<br />
21 74LS00 120,55 10,8<br />
22 74LS30 137,55 6,10<br />
23 74LS30 120,80 8,9<br />
24 74LS138 135,78 6,10<br />
25 74LS20 120,108 7,10 10,6<br />
26 74LS139 137,105 6,8<br />
27 7438 3,124 2,4 4,2 4,10 12,7<br />
28 74LS51 50,143 7,7 9,6<br />
29 74LS32 65,143 5,6 8,7 8,8<br />
30 74LS74 78,143 8,6<br />
31 74LS34 90,143 5,9 8,7<br />
32 74LS259 105,143 5,10<br />
33 74LS04 58,164 4,9 10,9 10,3<br />
34 74LS74 71,164 8,7<br />
35 LM324 151,205 13,5<br />
36 74LS10 215,122 4,2 10,3<br />
37 74LS04 228,122 8,6 10,3 10,6<br />
38 74LS86 241,122 5,3<br />
39 74LS283 197,145 5,2<br />
40 74S00 206.149 4,2 6,5 8,6 (Previously 74LS00)<br />
41 74LS02 228,149 4,4 7,4<br />
42 74LS163 241,158 12,6<br />
43 74S04 187,174 7,6 8,4<br />
56
44 74LS74 206,174 12,1<br />
45 74S139 228,172 7,5<br />
46 74S74 252,183 12,2<br />
47 74LS86 264,183 13,2<br />
48 74LS86 275,183 13,1<br />
49 74LS00 286,183 13,2<br />
50 74LS00 298,183 12,6 13,1<br />
51 (27128) 214,24 8,9 Operating system ROM<br />
52 (27128) 233,24 9,9 BASIC ROM<br />
53 4816 287,69 8,2<br />
54 4816 287,93 8,2<br />
55 4816 275,93 8,3<br />
56 4816 298,146 8,4<br />
57 4816 287,146 8,2<br />
58 4816 275,146 8,2<br />
59 4816 264,146 8,3<br />
60 4816 252,146 8,4<br />
61 4816 298,68 6,2<br />
62 4816 298,93 6,2<br />
63 4816 264,93 6,3<br />
64 4816 298,122 6,4<br />
65 4816 287,122 7,2<br />
66 4816 275,122 7,2<br />
67 4816 264,122 7,3<br />
68 4816 252,122 7,4<br />
69 6522 160,29 2,6 External VIA<br />
70 74LS244 137,24 2,6<br />
71 74LS244 184,29 2,4<br />
72 74LS245 199,29 2,3<br />
73 uPD7002 100,173 14,6 ADC convertor<br />
74 88LS120 183,201 13,4<br />
75 3691 207,199 14,4<br />
76 74LS163 70,44 10,8<br />
77 74S00 38,143 4,8 4,9<br />
78 8271 60,75 3,9 Disc controller<br />
79 7438 42,46 2,9<br />
80 7438 57,46 2,9<br />
81 74LS393 82,46 2,8<br />
82 74LS10 97,46 3,8<br />
83 4013 67,24 4,7<br />
84 4013 82,24 3,7<br />
85 4020 97,21 2,7<br />
86 74LS393 108,23 2,7<br />
87 74LS123 43,164 2,10 13,8<br />
88 2764 252,24 9,9<br />
89 68B54 15,125 12,8 ADLC - Econet<br />
90 40178 16,162 13,10 (Not fitted)<br />
91 74LS132 27,166 12,7 14,9<br />
92 74LS74 16,188 14,10 (Not fitted)<br />
93 75159 13,166 14,9<br />
94 LM319 45,93 13,8<br />
95 LM319 20,193 13,7<br />
96 74LS244 82,185 12,10<br />
97 74LS74 4,171 13,9<br />
98 TMS6100 15,75 4,8 Speech ROM<br />
99 TMS5220 35,75 5,7 Speech generator<br />
100 (27128) 272,24 10,9 Sideways ROM<br />
101 (27128) 290,24 11,9 Sideways ROM<br />
57
8,2 Transistors<br />
Q Type Circuit<br />
Diagram<br />
1 BC239 13,5<br />
2 BC239 13,5<br />
3 BC239 13,5<br />
4 BC239 11,3<br />
5 BC239 12,3<br />
6 BC239 12,3<br />
7 BC309 14,2<br />
8 BC309 13,2<br />
9 BC239 14,1<br />
10 2N3906 11,2<br />
11 BC239 2,4<br />
8.3 Diodes<br />
D Type Circuit<br />
Diagram<br />
1 1N4148 6,8<br />
2 1N4148 4,6<br />
3 1N4148 14,7<br />
4 1N4148 10,8 Not fitted<br />
5 1N4148 10,8 Not fitted<br />
6 1N4148 14,6<br />
7 1N4148 14,6<br />
8 1N4148 14,6<br />
9 1N4148 12,5 Not fitted<br />
10 1N4148 8,8 Not fitted, issue 7 onwards<br />
11 1N4148 8,8 Not fitted, issue 7 onwards<br />
12 1N4148 8,8 Not fitted, issue 7 onwards<br />
13 1N4148 13,5<br />
14 1N4148 3,3<br />
15 1N4148 3,3<br />
16 1N4002 11,1<br />
17 1N4002 11,1<br />
18 1N4002 11,1<br />
19 1N4148 13,1<br />
20 1N4148 13,3<br />
21 1N4148 13,3<br />
22 1N4148 13,3<br />
8.4 Capacitors<br />
C Type Circuit<br />
Diagram<br />
1 2n2F Plate ceramic 4,6<br />
2 4u7F 16V Elec 4,5<br />
3 2n2F Plate ceramic 4,6<br />
4 Not used<br />
5 10uF 16V Elec 4,5<br />
6 100nF Disc ceramic 6,7<br />
7 2n2F Plate ceramic 4,5<br />
8 100nF Disc ceramic 6,7<br />
58
9 10uF 16V Elec 4,4<br />
10 lOnF Plate ceramic 6,7<br />
11 2n2F Plate ceramic 4,5<br />
12 10pF Plate ceramic 5,7<br />
13 1nF Plate ceramic 2,10<br />
14 47uF 10V Elec 3,1<br />
15 100nF Disc ceramic 5,5<br />
16 47uF 10V Elec 5,5<br />
17 2n2F Plate ceramic 13,9<br />
18 10uF 10V Tant 14,8<br />
19 Not used<br />
20 47nF Disc ceramic 5,5<br />
21 100nF Disc ceramic 5,7<br />
22 Not used<br />
23 l0nF Plate ceramic 13,8<br />
24 100nF Disc ceramic 6,7<br />
25 33 n F Polyester 14,6<br />
26 47uF 10V Elec 4,1<br />
27 luF 35V Tant 14,6<br />
28 4u7F 10V Tant 12,5<br />
29 2n2F Plate ceramic 13,5<br />
30 10uF 10V Tant 12,5<br />
31 820pF Plate ceramic 15,5<br />
32 4n7F Plate ceramic 14,5<br />
33 4n7F Plate ceramic 13,5<br />
34 200/220nF 14,5<br />
35 820pF Plate ceramic 15,5<br />
36 47uF 10V Tant 4,1<br />
37 33pF Plate ceramic 6,6<br />
38 2n2F Plate ceramic 13,3<br />
39 2n2F Plate ceramic 13,3<br />
40 l0nF Plate ceramic 7,6<br />
41 220pF Plate ceramic 8,5<br />
42 33pF Plate ceramic 6,5<br />
43 47pF Plate ceramic 14,4<br />
44 Not used<br />
45 l0nF Plate ceramic 13,1<br />
46 47pF Plate ceramic 14,4<br />
47 10uF 10V Tant 11,1<br />
48 270pF Plate ceramic 8,5<br />
49 150pF Plate ceramic 13,2<br />
50 47pF Plate ceramic 14,2<br />
51 15/22pF Plate ceramic 11,2 (SOT)<br />
52 390pF Plate ceramic 11,2<br />
53 100pF Plate ceramic 11,2<br />
54 47uF 10V Tant 4,1<br />
55 100pF Plate ceramic 11,1<br />
56 39pF Plate ceramic 14,1<br />
57 10uF 10V Tant 3,1<br />
58 470pF Plate ceramic 14,2<br />
59 220nF 13,5<br />
60 4u7F 10V Tant 3,1<br />
59
8,5 Resistors<br />
R Value Circuit<br />
Diagram<br />
1 10k 4,6<br />
2 10k 5,6<br />
3 10k 5,6<br />
4 22k 4,6<br />
5 100k 3,6<br />
6 4k7 1,5<br />
7 100k 3,6<br />
8 10k 4,5<br />
9 39k 4,6<br />
10 3k3 4,2<br />
11 100k 3,6<br />
12 220k 3,6<br />
13 1M 6,7<br />
14 10R 4,5<br />
15 39k 3,5<br />
16 22k 4,5<br />
17 10k 4,5<br />
18 10R 4,4<br />
19 Not used<br />
20 1M 6,8<br />
21 1M 6,7<br />
22 150R 3,9<br />
23 150R 3,9<br />
24 39k 4,4<br />
25 Not used<br />
26 Not used<br />
27 10k 3,5<br />
28 4k7 3,5<br />
29 1k 3,5<br />
30 10k 5,6<br />
31 4k7 5,6<br />
32 150k 5,7<br />
33 1k 2,10<br />
34 10k (2%) 14,8<br />
35 10k (2%) 14,8<br />
36 1M5 13,8<br />
37 k 2,9<br />
38 100K (2%) 14,8<br />
39 100K (2% 14,8<br />
40 100K (2%) 14,8<br />
41 100K (2%) 14,8<br />
42 Not used<br />
43 Not used<br />
44 1M5 13,9<br />
45 10k (2%) 13,8<br />
46 k 13,8<br />
47 k5 (2%) 14,8<br />
48 k (2%) 14,8<br />
49 150R 2,10<br />
50 39k 12,9<br />
51 10k (2%) 14,8<br />
52 k 13,9<br />
53 1k 4,7<br />
54 Not used<br />
55 3k3 8,8 Not fitted, issue 7 onwards<br />
60
56 Not used<br />
57 10R 5,5<br />
58 150R 1,7<br />
59 56k (2%) 13,7<br />
60 56k (2%) 13,7<br />
61 1k 13,8<br />
62 56k (2%) 13,7<br />
63 56k (2%) 13,7<br />
64 1M5 13,7<br />
65 3k3 3,10<br />
66 10k 5,10<br />
67 10k 5,10<br />
68 3k3 2,7<br />
69 3k3 10,8<br />
70 3k3 2,6<br />
71 2k7 14,6<br />
72 3k3 8,9 Not fitted, issue 7 onwards<br />
73 3k3 7,9 Not fitted, issue 7 onwards<br />
74 2k2 12,5<br />
75 82k 12,5<br />
76 10k 13,5<br />
77 100k 13,5<br />
78 150k 14,4<br />
79 820k 15,5<br />
80 39k 14,5<br />
81 3k3 10,6<br />
82 150k 14,4<br />
83 4k7 5,4<br />
84 10k 13,5<br />
85 3k3 10,6<br />
86 220k 14,5<br />
87 8k2 14,5<br />
88 8k2 14,5<br />
89 4k7 13,4<br />
90 4k7 13,5<br />
91 820R 7,6<br />
92 820R 7,6<br />
93 3k3 14,4<br />
94 ,100R 8,6<br />
95 2k2 14,4<br />
96 3k3 14,4<br />
97 2k2 14,4<br />
98 1k2 7,5<br />
99 1k2 10,2<br />
100 1k2 11,2<br />
101 1k0 11,2<br />
102 100R 6,5<br />
103 1k0 10,2<br />
104 100R 9,8 Not fitted, issue 4 onwards<br />
105 100R 8,6<br />
106 56R 8,4<br />
107 1k0 7,5<br />
108 3k3 3,3<br />
109 1k8/2k713,1 SOT<br />
110 68R 14,2<br />
111 68R 14,3<br />
112 68R 14,3<br />
113 68R 14,3<br />
114 18R 1W 11,1<br />
115 1k0 14,2<br />
61
116 3k9 14,2<br />
117 2k2 14,2<br />
118 1k0 14,2<br />
119 100R 8,5<br />
120 82R 12,3<br />
121 82R 11,3<br />
122 82R 11,3<br />
123 470R 14,2<br />
124 56R 7,4<br />
125 100R 9,8 Not fitted, issue 4 onwards<br />
126 3k9 14,1<br />
127 1k5 14,2<br />
128 470R 13,2<br />
129 68R 14,2<br />
130 68R 13,2<br />
131 56R 7,4<br />
132 120k 14,1<br />
133 120k 14,1<br />
134 1k0 14,2<br />
135 1k0 14,1<br />
136 2k2 13,3<br />
137 3k9 13,2<br />
138 1k5 13,2<br />
139 1k0 13,2<br />
140 1k0 14,2<br />
141 2k7 14,2<br />
142 100R 9,8 Not fitted, issue 4 onwards<br />
143 12k 11,2<br />
144 15k 11,2<br />
145 1k0 11,2<br />
146 1k5 11,1<br />
147 3k9 11,1<br />
148 820R 14,2<br />
149 100R 9,8 Not fitted, issue 4 onwards<br />
150 680R 14,2<br />
151 470R 14,1<br />
152 2k2 14,2<br />
153 100R 9,8 Not fitted, issue 4 onwards<br />
154 1k2 14,1<br />
155 680R 14,1<br />
156 3k3 14,1<br />
157 680R 14,1<br />
158 470R 14,1<br />
159 270k 13,5<br />
160 3k3 12,4<br />
161 5k6 13,4<br />
162 4k7 1,6<br />
163 Not used<br />
164 Not used<br />
165 Not used<br />
166 Not used<br />
167 Not used<br />
168 Not used<br />
169 Not used<br />
170 2k2 2,5<br />
171 100R 13,6<br />
172 10k 4,6<br />
173 4k7 12,8<br />
174 22k 12,3<br />
62
8.6 Links<br />
Some links have been omitted on later issue boards, whilst others have<br />
been added.<br />
LINK PCB Circuit position diagram<br />
1. 2,108 2,5 (Not used on issues 2 and 3)<br />
2. 2,161 12,7<br />
3. 2,173 14,14 (Only fitted on issues 1,2,3)<br />
4. 12, 12 1,9<br />
5. 26,195 14,9 (Only fitted on issues 1,2,3)<br />
6. 26,205 15,9 (Only fitted on issues 1,2,3)<br />
7. 30, 65 4,9<br />
8. 32, 15 2,9<br />
9. 35,128 3,10<br />
10. 45, 15 1,8<br />
11. 75,210 13,10<br />
12. 97, 70 9,8<br />
13. 100, 67 9,8<br />
14. 101, 53 7,10<br />
15. 107, 97 7,9<br />
16. 108, 90 7,9<br />
17. 108, 52 7,10<br />
18. 110, 52 7,8<br />
19. 102,102 7,8<br />
20. 123, 55 9,8<br />
21. 122, 65 9,8<br />
22. 127, 70 9,8<br />
23. 177,215 13,3<br />
24. 181,195 13,3<br />
25. 215,185 7,5<br />
26. 221, 68 10,1<br />
27. 226, 95 1,7<br />
28. 237,144 12,6<br />
29. 237,146 12,6<br />
30. 284, 20 8,8<br />
31. 270,170 14,3<br />
32. 295, 65 9,9<br />
33. 295, 67 10,9<br />
34. 200, 65 9,8 (From issue 4 onwards)<br />
35. 245, 20 9,8 (From issue 4 onwards)<br />
36. 260, 20 9,8 (From issue 4 onwards)<br />
37. 280, 20 9,8 (From issue 4 onwards)<br />
38. 300, 15 9,8 (From issue 4 onwards)<br />
39. 255,215 9,8 (From issue 4 onwards)<br />
63
6 4
9 Appendices<br />
65
9.8 Parts list<br />
CASE LOWER ASSEMBLY MODEL B + ECONET + DISC<br />
ITEM PART No DESCRIPTION QTY REMARKS<br />
1 A2/210,232 CASE LOWER 1<br />
2 A2/103,500 MAIN PCB ASSEMBLY MODEL B+ECONET+DISC 1<br />
3 A1/103,004/A CASE LOWER ASSY REF 'STANDARD' DRG<br />
4 A1/103,001 KEYBOARD ASSEMBLY (INC SPKR) 1<br />
5 A2/21,111 CUT RIGID PVC LABEL BOTTOM ACCESS 1<br />
6 A2/201,098 CUT RIGID PVC LABEL REAR ACCESS 1<br />
7<br />
8 890,000 STICK ON FEET 4<br />
9<br />
10 800,600 B.N.C. CONNECTOR 75R 1 PANEL MOUNT SK2<br />
11 870,109 WIRE 7/0,2 WHITE PVC 2 2" LENGTH<br />
12<br />
13 882,644 No 8 x 9.5 FLANGE HEAD POSIDRIV 5 BLACK SELF TAP<br />
14 882,712 No 4 x 7/16" PAN HD SUPERDRIVE 2 PLASTITE<br />
15 882,986 NYLON WASHER I/D 5mm 5<br />
16<br />
17<br />
18<br />
19 882,022 M3 x 8mm CHEESE HEAD POST DRIVE 3 USE WITH ITEM 24<br />
20<br />
21<br />
22<br />
23<br />
24 103.003 POWER SUPPLY UNIT 1 ASTEC SMPS<br />
25<br />
26<br />
27 882,988 4 BA INTERNAL TOOTH SHAKEPROOF WASHER 2<br />
28 882,914 4BA NUT FULL 2<br />
29 882,343 4BA x 5/8" PAN HD POSIDRIV 2<br />
30<br />
81
MAIN CIRCUIT BOARD MODEL B + DISC + ECONET<br />
ITEM PART No DESCRIPTION QTY REMARKS<br />
1 203000 PRINTED CIRCUIT BOARD 1<br />
2 103,500/A ASSEMBLY DRAWING MODEL B +DISC+ECONET 1 PER WORKS ORDER<br />
3<br />
4 520,180 RESISTOR 18R 1W 10% CARBON FILM 1 R114<br />
5<br />
6 500,100 RESISTOR 10R 1/4W 10% CARBON FILM 3 R14 18 57<br />
7 500,560 RESISTOR 56R 10% CARBON FILM 3 8106,124,131<br />
8 500,680 RESISTOR 68R 1/4W 10% CARBON FILM 6 R110,113,129,130<br />
9 500,820 RESISTOR 82R 1/4W 10% CARBON FILM 3 R120,121,122<br />
10 500,101 RESISTOR 100R 1/4W 10% CARBON FILM 5 R94,102,105,119,<br />
171<br />
11 500,151 RESISTOR 150R 14W 10% CARBON FILM 4 R22,23,49,<br />
12 500,471 RESISTOR 470R 1/4W 10% CARBON FILM 4 R123,128,15518,158<br />
13 500,681 RESISTOR 680R 1/4W 10% CARBON FILM 3 R150,155,157<br />
14 500,821 RESISTOR 820R 1/4W 10% CARBON FILM 3 R91,92,148<br />
15<br />
16 500,102 RESISTOR 1K 1/4W 10% CARBON FILM 20 R29,33,37,46,52,<br />
53,61,101,103,<br />
107,115,118,134,<br />
135,139,140,145,<br />
98,99,100<br />
17<br />
18<br />
19 500,122 RESISTOR 1K2 1/4W 10% CARBON FILM 2 R154,127<br />
20 500,152 RESISTOR 1K5 1/4W 10% CARBON FILM 2 R138,146<br />
21 500,222 RESISTOR 2K2 1/4W 10% CARBON FILM 7 R74,95,97,117,<br />
136,152,170<br />
22 500,272 RESISTOR 2K7 1/4W 10% CARBON FILM 1 R71<br />
23 500,332 RESISTOR 3K3 1/4W 10% CARBON FILM 12 R10,65,68,69,70, 81,85,93,96,<br />
108, 156,160<br />
24<br />
25 500,182 RESISTOR 1K8 1/4W 10% CARBON FILM 1 R141<br />
26 500,392 RESISTOR 3K9 10% CARBON FILM 4 R116 126,137 147<br />
27 500,472 RESISTOR 4K7 1/4W 10% CARBON FILM 8 R6,28,31,83,89,<br />
90,162,173<br />
28 500,562 RESISTOR 5K6 1/4W 10% CARBON FILM 1 R161<br />
29 500,822 RESISTOR 8K2 1/4W 10% CARBON FILM 2 R87,88<br />
30<br />
31 500,103 RESISTOR 10K 1/4W 10% CARBON FILM 12 R1-3,8,17,27,30,<br />
66,67,76,84,172<br />
32<br />
33 500,123 RESISTOR 12K 1/4W 10% CARBON FILM 1 R143<br />
34 500,153 RESISTOR 15K 1/4W 10% CARBON FILM 1 R144<br />
35 500,223 RESISTOR 22K 1/4W 10% CARBON FILM 3 R4,16,174<br />
36 500,393 RESISTOR 39K 1/4W 10% CARBON FILM 5 R9,15,24,50,80<br />
37 500,823 RESISTOR 82K 1/4W 10% CARBON FILM 1 R75<br />
38 500,104 RESISTOR 100K 1/4W 10% CARBON FILM 4 R5,7,11,77<br />
39 500,124 RESISTOR 120K 1/4W 10% CARBON FILM 2 R132,133<br />
40 500,154 RESISTOR 150K 1/4W 10% CARBON FILM 2 78,82<br />
41<br />
42 500,224 RESISTOR 220K 1/4W 10% CARBON FILM 2 R12,86<br />
43 500,274 RESISTOR 270K 1/4W 10% CARBON FILM 1 R159<br />
44 500,824 RESISTOR 820K 1/4W 10% CARBON FILM 1 R79<br />
45<br />
46 500,105 RESISTOR 1M 1/4W 10% CARBON 3 R13,20,21<br />
47 500,155 RESISTOR 1M5 1/4W 10% CARBON 3 R36,44,64<br />
48 590,682 RESISTOR PACK S.I.P. 6K8 x 8 1 RP1<br />
49 590,223 RESISTOR PACK S.I.P. 22K x 8 1 RP2<br />
50 580,103 POTENTIOMETER 10K VERT. MIN. PRESET 1 VR1<br />
51 580,204 POTENTIOMETER 200K VERT. MIN. PRESET 1 VR2<br />
52<br />
53 500,182/272 RESISTOR 1K8/2K7 1/4W 10% CARBON FILM 1 R109,S.O.T. ON<br />
BATCH BASIS<br />
54<br />
55 505,102 RESISTOR 1K 1/4W 2% CARBON 1 R48<br />
56 505,152 RESISTOR 1K5 1/4W 2% CARBON 1 R47<br />
57 505,103 RESISTOR 10K 1/4W 2% CARBON 4 834,35,45,51<br />
58 505,563 RESISTOR 56K 1/4W 2% CARBON 4 859,60,62,63<br />
59 505,104 RESISTOR 100K 1/4W 2% CARBON 4 838,39,40,41<br />
60<br />
61 631,010 CAPACITOR 10pF PLATE CERAMIC 1 C12<br />
62 631M015/022 CAPACITOR 15722pF PLATE CERAMIC 1 C51,S.O.I. ON<br />
BATCH BASIS<br />
63 631,033 CAPACITOR 33pF PLATE CERAMIC 2 C37,42<br />
64 631,039 CAPACITOR 39pF PLATE CERAMIC 1 C56<br />
82
65 631,047 CAPACITOR 47pF PLATE CERAMIC 1 C50<br />
66 631,100 CAPACITOR 100pF PLATE CERAMIC 2 C53,55<br />
67 631,150 CAPACITOR 150pF PLATE CERAMIC 1 C49<br />
68<br />
69 631,220 CAPACITOR 220pF PLATE CERAMIC 1 C41<br />
70 631,270 CAPACITOR 270pF PLATE CERAMIC 1 C48<br />
71 630,039 CAPACITOR 390pF PLATE CERAMIC 1 C52<br />
72 630,082 CAPACITOR 820pF PLATE CERAMIC 2 C31,35<br />
73 632,047 CAPACITOR 47pF PLATE CERAMIC 2 C43,46<br />
74 633,047 CAPACITOR 470pF PLATE CERAMIC 1 C58<br />
75 629,001 ^ CAPACITOR 1nF PLATE CERAMIC 1 C13<br />
76 629,002 CAPACITOR 2n2F PLATE CERAMIC 6 C1,3,7,11,17,29<br />
77 634,004 CAPACITOR 4u7F PLATE CERAMIC 2 C32,33<br />
78 629,010 CAPACITOR l0nF PLATE CERAMIC 4 C10,23,40,45<br />
79 650,333 CAPACITOR 33nF POLYESTER 1 C25<br />
80 680,001 CAPACITOR, DECOUPLER 33/47 nF 76 A<br />
81 628,470 CAPACITOR 47nF DISC CERAMIC 1 C20<br />
82 628,101 CAPACITOR 100nF DISC CERAMIC 5 C6,8,15,21,24<br />
83 634,002 CAPACITOR 2n2F PLATE CERAMIC 2 C38,39<br />
84 651,224 CAPACITOR 220nF 1 C59<br />
85 613,100 CAPACITOR luF 35V TANTALUM 1 C27<br />
86 610,005 CAPACITOR 4u7F 10V TANTALUM 2 C28,60<br />
87 635,047 CAPACITOR 4u7F 16V RADIAL ELEC 1 C2<br />
88 610,010 CAPACITOR 10uF 10V TANTALUM 4 C18,30,47,57<br />
89 635,100 CAPACITOR 10uF 16V RADIAL ELEC 2 C5,9<br />
90 610,047 CAPACITOR 47uF 10V TANTALUM 2 C36,54<br />
91 621,470 CAPACITOR 47uF 10V AXIAL ELEC 3 C14,16,26<br />
92 651,204/224 CAPACITOR 200/220nF 1 C34<br />
93<br />
94 699,001 TRIMMING CAPACITOR 2-22pF 1 VC1<br />
95<br />
96<br />
97 860,005 CHOKE 33 uH 1 L1<br />
98<br />
99<br />
100 820,160 CRYSTAL 16 MHz 1 X1<br />
101 820,177 CRYSTAL 17,7345 MHz 1 X2<br />
102<br />
103<br />
104 794,002 DIODE IN 4002 3 D16,17,18<br />
105 794,148 DIODE IN 4148 12 D1,2,6,7,8,<br />
13-15,19-22<br />
106<br />
107<br />
108 810,001 RELAY 5V 1 RL1<br />
109<br />
110<br />
111 780,239 TRANSISTOR BC 239 8 Q1-6,9,11<br />
112 780,309 TRANSISTOR BC309 2 Q7,8<br />
113 783,906 TRANSISTOR 2N3906 1 Q10<br />
114<br />
115<br />
116 800,114 I.C. SOCKET D.I.L. 14 PIN 4 55,94,95,93<br />
117 800,120 I.C. SOCKET D.I.L. 20 PIN 1 IC14<br />
118<br />
119 800,128 I.C. SOCKET D.I.L. 28 PIN 11 IC6,7,51,52,73,<br />
89,98,99,100,101<br />
120 800,140 I.C. SOCKET D.I.L. 40 PIN 5 ICI-3,69 78<br />
121 740,038 INTEGRATED CIRCUIT 7438 3 IC27,79,80<br />
122 741,000 INTEGRATED CIRCUIT 74S00 1 IC40<br />
123 742,000 INTEGRATED CIRCUIT 74LS00 4 IC21,49,50,77<br />
124 742,002 INTEGRATED CIRCUIT 74LS02 1 IC41<br />
125 741,004 INTEGRATED CIRCUIT 74SO4 1 IC43<br />
126 742,004 INTEGRATED CIRCUIT 74LS04 2 IC33,37<br />
127 742,010 INTEGRATED CIRCUIT 74LS10 2 IC36,82<br />
128 742,020 INTEGRATED CIRCUIT 74LS20 1 IC25<br />
129 742,030 INTEGRATED CIRCUIT 74LS30 2 IC22,23<br />
130 742,032 INTEGRATED CIRCUIT 74LS32 1 IC29<br />
131 742,051 INTEGRATED CIRCUIT 74LS51 1 IC28<br />
132 741,074 INTEGRATED CIRCUIT 74S74 1 IC46<br />
133' 742,074 INTEGRATED CIRCUIT 74LS74 5 IC30,31,34,44,97<br />
134 742,086 INTEGRATED CIRCUIT 74LS86 3 IC38,47,48<br />
135 742,138 INTEGRATED CIRCUIT 74LS138 1 IC24<br />
136 741,139 INTEGRATED CIRCUIT 74S139 1 IC45<br />
137 742,139 INTEGRATED CIRCUIT 74LS139 2 IC20,26<br />
138 742,163 INTEGRATED CIRCUIT 74LS163 2 IC42,76<br />
139 742,244 INTEGRATED CIRCUIT 74LS244 3 IC70,71,96<br />
140 742,245 INTEGRATED CIRCUIT 74LS245 2 IC14,72<br />
141 742,259 INTEGRATED CIRCUIT 74LS259 1 IC32<br />
142 742,273 INTEGRATED CIRCUIT 74LS273 1 IC15<br />
83
143 742,283 INTEGRATED CIRCUIT 74LS283 1 IC39<br />
144 770,324 INTEGRATED CIRCUIT LM324 2 IC17,35<br />
145 770,386 INTEGRATED CIRCUIT LM386 1 IC19<br />
146 770,555 INTEGRATED CIRCUIT LM555 1 IC16<br />
147 738,095/097 INTEGRATED CIRCUIT 81<br />
LS95/97 2 IC12,13<br />
148 706,489 INTEGRATED CIRCUIT 76489 1 IC18<br />
149 738,095 INTEGRATED CIRCUIT 81LS95 4 IC8-11<br />
150 739,120 INTEGRATED CIRCUIT 88LS120 1 IC74<br />
151 706,502 INTEGRATED CIRCUIT 6502A 1 IC1<br />
152 706,522 INTEGRATED CIRCUIT 6522 2 IC3,69<br />
153 706,845 INTEGRATED CIRCUIT 6845 1 IC2<br />
154 706,850 INTEGRATED CIRCUIT 6850 1 IC4<br />
155 733,691 INTEGRATED CIRCUIT 3691 1 IC75<br />
156 705,050 INTEGRATED CIRCUIT SAA5050 1 IC5<br />
157 201,601/647 INTEGRATED CIRCUIT<br />
VIDEO PROCESSOR 1 IC6<br />
158 201,602/648 INTEGRATED CIRCUIT<br />
SERIAL PROCESSOR 1 IC7<br />
159 707,002 INTEGRATED CIRCUIT 7002 1 IC73<br />
160 704,816 INTEGRATED CIRCUIT 4816 16 IC53-68<br />
161 201,629 INTEGRATED CIRCUIT 23128 1 IC51 (OPERATING<br />
SYSTEM)<br />
162 201,628 INTEGRATED CIRCUIT 23128 1 IC52 (BASIC)<br />
163<br />
164 800,004 SOCKET D.I.N. 5 WAY 1 SK7<br />
165 825,000 SOCKET UM1233-E36 1 SK1 (UHF<br />
MODULATOR)<br />
166 800,002 SOCKET D.I.N. 6 WAY 1 SK3<br />
167 800,001 SOCKET D.I.N. 5 WAY DOMINO 1 SK4<br />
168 800,003 SOCKET D.I.N. 7 WAY 1 SK5<br />
169 800,304 SOCKET 'D' TYPE 15 WAY 1 SK6<br />
170<br />
171 800,059 PLUG 17 WAY 1 PL13 (KEYBOARD)<br />
172 800,055 PLUG 10 WAY 1 PL14 (SERIAL ROM)<br />
173 800,050 PLUG 2 WAY 4 PL15 S21(2),39<br />
174 800,051 PLUG 3 WAY 7 S20,22,25,26,<br />
31-33<br />
175 800,070 SHUNT 16 S20,21(2),22,25,<br />
26,31-33,S11(7)<br />
176 800,054 PLUG 8 WAY 2 S11<br />
177 880,040 SLEEVING BLACK NEOPRENE A/R FIT TO R114<br />
178 201,029 HEATSINK 1 FIT T0 IC6 IF<br />
201,601<br />
179 870,420 WIRE TCW A/R 18(N),19(E)<br />
180 800,200 FASHION TAB 7<br />
181 800,006 CONNECTOR IDC 34 WAY 2 PL8,11<br />
182 800,008 CONNECTOR IDC 26 WAY 1 PL9<br />
183 800,009 CONNECTOR IDC 20 WAY 1 PL10<br />
184 800,007 CONNECTOR IDC 40 WAY 1 PL12<br />
185<br />
186 742,123 INTEGRATED CIRCUIT 74LS123 1 IC87<br />
187 742,132 INTEGRATED CIRCUIT 74LS132 1 IC91<br />
188 742,393 INTEGRATED CIRCUIT 74LS393 2 IC81,86<br />
189 735,159 INTEGRATED CIRCUIT 75159 1 IC93<br />
190 706,854 INTEGRATED CIRCUIT 68B54 1 IC89<br />
191 754,013 INTEGRATED CIRCUIT 4013 2 IC83,84<br />
192 754,020 INTEGRATED CIRCUIT 4020 1 IC85<br />
193 708,271 INTEGRATED CIRCUIT 8271 1 IC78<br />
194 770,319 INTEGRATED CIRCUIT LM319 2 IC94,95<br />
195 201,666 INTEGRATED CIRCUIT 27128* 1 IC88 (DNFS ROM)<br />
84
9.9 Glossary of abbreviations<br />
ACK ACKnowledge line on the printer port<br />
ACIA Asynchronous Communications Interface Adaptor - serial to<br />
parallel and parallel to serial converter (6850)<br />
ADC Analogue to Digital Converter<br />
ADLC Advanced Data Link Controller - Econet control IC (68B54)<br />
ADSR Attack, Decay, Sustain, Release - defining the envelope of<br />
a sound<br />
ASCII American Standard Code for Information Interchange - binary<br />
code for representing alphanumeric characters.<br />
BASIC Beginners All-purpose Symbolic Instruction Code<br />
<strong>BBC</strong> British Broadcasting Corporation<br />
BNC Bayonet-Neill-Concelman - the type of bayonet connector<br />
used for the video output<br />
CA1/2 Control lines associated with the PA port on a VIA<br />
CAS Column Address Strobe - control line :for the dynamic RAM<br />
CASO Refers to the area of RAM selected by the CASO line<br />
CAS1 Refers to the area of RAM selected by the CAS1 line<br />
CB1/2 Control lines associated with the PB port on a VIA<br />
CP/M Control Progam for <strong><strong>Micro</strong>computer</strong>s - Z80 based operating<br />
system<br />
CPU Central Processor Unit (6502)<br />
CR Capacitor Resistor network<br />
CRT Cathode Ray Tube<br />
CRTC Cathode Ray Tube Controller IC (6845)<br />
CSYNC Composite SYNChronisation pulse from the CRTC<br />
CTS Clear To Send - control input on the RS423 port<br />
CUTS An American standard for frequency shift keying - ie using<br />
two different tones to represent logic levels<br />
DIN Connectors such as the cassette socket, RGB socket etc<br />
DRAM Dynamic RAM<br />
EPROM Erasable Programmable -Read Only Memory<br />
FIT Final Inspection Tester<br />
FDC Floppy Disc Controller (8271)<br />
IC Integrated Circuit<br />
ID IDentity - refers to the unique number of a given Econet<br />
station<br />
IDC Insulation Displacement Connectors - parallel cable<br />
connectors underneath the computer<br />
IEEE488 A parallel interface usually associated with automatically<br />
controlled test instruments<br />
I/O Input Output<br />
IRQ Interrupt ReQuest - control line on the 6502 processor<br />
LK PCB link<br />
MAO-13 Memory Access - control lines out of the CRTC<br />
MOS Machine Operating System<br />
MPU <strong>Micro</strong>processor Unit<br />
NMI Non-Maskable Interrupt - control line on the 6502 processor<br />
PA Port A - One of the two ports of a VIA<br />
PAL Phase Alternation Line - coding method used for combining<br />
separate colour information into a single signal<br />
PB Port B - The other port of a VIA<br />
PCB Printed Circuit Board<br />
PET Progressive Establishment Tester<br />
PL Header plug<br />
PSU Power Supply Unit Q1 etc Transistor numbers<br />
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QWERTY These are the upper left keys on the keyboard ie refers to<br />
the standard keyboard layout<br />
RA0-2 Row Address lines from the CRTC to access the RAM<br />
RAM Random Access read/write Memory<br />
RAS Row Address Strobe - Control line for the DRAM<br />
RC Resistor Capacitor network<br />
RGB Red Green Blue - individual colour signals for the VDU<br />
ROM Read Only Memory ROMSEL ROM SELect latch<br />
RS423C An internationally defined convention for serial<br />
transmission of data<br />
RTS Ready To Send - control output on RS423 port<br />
SK Socket<br />
SOT Select On Test<br />
SW South West<br />
Taw Tinned Copper Wire<br />
TTL Tranistor Transistor Logic a standard type of digital IC (<br />
74- series)<br />
UHF Ultra High Frequency ` - signal for input to a TV aerial socket<br />
ULA Uncommitted Logic Array - semi-custom IC<br />
VDU Visual Display Unit<br />
VIA Versatile Interface Adaptor (6522)<br />
VR Variable .Resistor<br />
Z80 a' commonly used 8 bit microprocessor<br />
1MHz 1 MegaHertz - usually refers to the - interface bus running<br />
at that speed<br />
1MHzE Strobe to which the processor is synchronised when accessing " slow<br />
devices such as 6522 VIA and 1MHz bus<br />
2MHzF Strobe' to which the processor is synchronised when accessing "<br />
fast" devices such as ROM and DRAMs.<br />
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